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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> Design Comparator two stage open Loop in Weak Inversion CMOS https://designers-guide.org/forum/YaBB.pl?num=1456969798 Message started by Juan P on Mar 2nd, 2016, 5:49pm |
Title: Design Comparator two stage open Loop in Weak Inversion CMOS Post by Juan P on Mar 2nd, 2016, 5:49pm Hello Good Night. I am new in this site. I am trying design one "classical" comparator of two stage open loop in subtreshold operation. I was checking the reference from Allen, but here is only treated the analysis in strong inversion. I want to know the equations that I need to design to Comparator. I am very confussed 'cause the gain of whole circuit des not dependent of the W,L ratios. So that I don't know what may be the value of the bias current of the differential pair, because the Slew rate is only dependent os the current of the Common Source. Please, if somebody has reference for my question send me it :) :'( PD: I am sorry my poor english, I hope improve it soon. |
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