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Design >> Analog Design >> Any idea for implementation of error/difference amplifier?
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Message started by rfmagic on Mar 24^th, 2016, 2:15pm

Title: Any idea for implementation of error/difference amplifier?
Post by rfmagic on Mar 24^th, 2016, 2:15pm

Hi,

I want to design an amplifier that can measure the difference between a reference voltage and a measured voltage (both DC) with low gain.

The obvious architecture that first came up in my head was to use a differential pair with current mirror load in open loop mode (I have attached a drawing to this message) but the gain is very high and I am afraid that without applying a negative feedback the variation will be too big (variation to PVT).
In the picture below I need to measure Vout=A*(Vm-Vref), where A<10

I appreciate your comments and any other idea how to measure the difference between the 2 signals.

Title: Re: Any idea for implementation of error/difference amplifier?
Post by raja.cedt on Mar 24^th, 2016, 6:13pm

You cant use an opamp in the open loop, will saturate easily. Better go for difference amplifier (kind of inverting and non-inverting amp).

Best Regards,
Raj.

Title: Re: Any idea for implementation of error/difference amplifier?
Post by ULPAnalog on Mar 24^th, 2016, 6:19pm

Hello

How about diode connected load. Since you seem to be operating at low frequencies you could bias the input pair in weak inversion to maximize its gm (gm,p) while biasing the diode connected load in strong inversion. You will get a gain of gm,p/(2*gm,n) (Assuming you measure the output single-ended, otherwise for fully differential case gm,p/gm,n). By appropriate biasing you can get gain of around 2-5 V/V. Since it is a ratio of gm of PMOS to NMOS, you can expect it to vary across corners (Particularly fs and sf).

Title: Re: Any idea for implementation of error/difference amplifier?
Post by rfmagic on Mar 25^th, 2016, 1:34am

Thanks for your replies.

@raja.cedt: yes, this is my main concern in using an opamp in open loop. the inherent high gain will cause the signal to saturate very quickly and limit the useful operation range. You also mention a difference amplifier by using and inverting and non-inverting stages. Are you familiar with a specific configuration that works? can you please sketch something?

@ULPAnalog: The input signal range is quite big an thus will change considerably during the operation. this means that most of the time the devices will not be operating in weak inversion. Your other comment regarding the variation due to PMOS/NMOS makes this more problematic.

Title: Re: Any idea for implementation of error/difference amplifier?
Post by raja.cedt on Mar 25^th, 2016, 8:04am

Some thing like this probably work for you. use suitable common mode values.

Br,
Raj.

Title: Re: Any idea for implementation of error/difference amplifier?
Post by ULPAnalog on Mar 25^th, 2016, 10:21am

rfmagic wrote on Mar 25^th, 2016, 1:34am:

Thanks for your replies.

@ULPAnalog: The input signal range is quite big an thus will change considerably during the operation. this means that most of the time the devices will not be operating in weak inversion.

Is it the input common mode range or the differential mode range that is large?

Title: Re: Any idea for implementation of error/difference amplifier?
Post by rfmagic on Mar 27^th, 2016, 2:29pm

@raja.cedt: Thanks. This is very useful. Actually for the non inverting input it is sufficient to define the reference voltage and just make sure that the response is something like this: Vout=Vref(1+R2/R1)-Vm*(R2/R1).
Where Vref id the positive input, Vm the negative input, R2 the feedback resistor and R1 the series input resistor.

@ULPAnalog: It is the differential voltage that is large. Thus almost any open loop configuration will act as a limiter.

Title: Re: Any idea for implementation of error/difference amplifier?
Post by loose-electron on Mar 31^st, 2016, 11:16am

google op-amp circuits,

there are many application notes out there on the subject.