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https://designers-guide.org/forum/YaBB.pl Simulators >> AMS Simulators >> Faile Elaboration - ncelab: *E,CUCFUN https://designers-guide.org/forum/YaBB.pl?num=1557555127 Message started by Vivek Saurabh on May 10th, 2019, 11:12pm |
Title: Faile Elaboration - ncelab: *E,CUCFUN Post by Vivek Saurabh on May 10th, 2019, 11:12pm Hi, I have been trying to do AMS simulation with different type of Instances (verilog, verilogA , pdk created Schematic symbol) together. I am getting some errors and warnings which I cannot understand. The error is for the pdk nmos_b and pmos_b and even for rmres_b and others where components with _b is instantiated. The log looks like this :- ncelab(64): 15.20-s017: (c) Copyright 1995-2016 Cadence Design Systems, Inc. Elaborating the design hierarchy: ncelab: *W,CUNOUN: Cannot find any unit under XXXXX.nfet_b:symbol in the design libraries. ncelab: *W,DLLSVW: Unable to list the views of rfLib.rfLib (System error). ncelab: *W,DLLSVW: Unable to list the views of rfLib.log (System error). ncelab: *E,CUCFUN: instance 'N0' of the unit 'nfet_b' is unresolved in 'mmsim.inverter_analog:schematic'. ncelab: *W,CUNOUN: Cannot find any unit under XXXXX.pfet_b:symbol in the design libraries. ncelab: *E,CUCFUN: instance 'P0' of the unit 'pfet_b' is unresolved in 'mmsim.inverter_analog:schematic'. ncelab: *W,CUNOUN: Cannot find any unit under XXXXX.nfet_b:symbol in the design libraries. ncelab: *E,CUCFUN: instance 'N0' of the unit 'nfet_b' is unresolved in 'mmsim.buffer_analog:schematic'. ncelab: *W,CUNOUN: Cannot find any unit under XXXXX.pfet_b:symbol in the design libraries. ncelab: *E,CUCFUN: instance 'P0' of the unit 'pfet_b' is unresolved in 'mmsim.buffer_analog:schematic'. ncelab: Memory Usage - 49.8M program + 35.3M data = 85.1M total (Peak 85.1M) ncelab: CPU Usage - 0.4s system + 0.8s user = 1.2s total (5.5s, 21.7% cpu) Failed to elaborate ("mmsim" "hierarchy_test" "config"). XXXXX is pdk technology library name. I am not worried about warnings. I need help with errors, and want to know why should _b bother me. |
Title: Re: Faile Elaboration - ncelab: *E,CUCFUN Post by Andrew Beckett on May 16th, 2019, 11:18pm Hard to know without seeing more details, but did you supply the transistor model files to the simulator (in ADE this is under Setup->Model Libraries)? |
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