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https://designers-guide.org/forum/YaBB.pl Modeling >> Behavioral Models >> VCO Phase Noise 40dB/dec instead of 20dB/dec in PNoise https://designers-guide.org/forum/YaBB.pl?num=1594235090 Message started by Hudson on Jul 8th, 2020, 12:04pm |
Title: VCO Phase Noise 40dB/dec instead of 20dB/dec in PNoise Post by Hudson on Jul 8th, 2020, 12:04pm Hi all, I am using verilog to model VCO with phase noise. The VCO frequency is the summation of f0 + Kvco*Vcont + white_noise and I calculate the phase with the idtmod function. " wn1 = 2*pow(Fos,2)*pow(10,(phasenoise/10)); V(vn)<+white_noise(wn1, "wpn_osc"); freq = (V(in) - vmin)*(fmax - fmin) / (vmax - vmin) + fmin + V(vn); phase = 2*`M_PI*idtmod(freq, 0.0, 1.0, -0.5); V(out) <+ va*sin(phase); " However, the phase noise has 40dB/dec roll-off in Pnoise simulation, which supposedly should be 20dB/dec. I also check that vn is white indeed. Then I did an experiment to directly add white noise to the phase, the output phase noise turns out to be 20dB/dec roll-off now. I do not know where the problem could be. The full code is attached below module vco0 (out, in , vn); input in; voltage in; // input terminal output out; voltage out; // output terminal output vn; voltage vn; parameter real vmin=0; // input voltage that corresponds to minimum output frequency parameter real vmax=vmin+1 from (vmin:inf); // input voltage that corresponds to maximum output frequency parameter real fmin=1 from (0:inf); // minimum output frequency parameter real fmax=2*fmin from (fmin:inf); // maximum output frequency parameter real va=1; // amplitude parameter real Fos = 1M;// from (0:inf); // offset frequency at which phase noise is given parameter real phasenoise = -120 from [-400:inf); // phase noise level real wn1; // noise sources real freq, phase; integer n; //voltage vn; analog begin // compute the freq from the input voltage wn1 = 2*pow(Fos,2)*pow(10,(phasenoise/10)); V(vn)<+white_noise(wn1, "wpn_osc"); freq = (V(in) - vmin)*(fmax - fmin) / (vmax - vmin) + fmin + V(vn); // bound the frequency (this is optional) // if (freq > fmax) freq = fmax; // if (freq < fmin) freq = fmin; // bound the time step to assure no cycles are skipped $bound_step(0.1/freq); // phase is the integral of the freq modulo 2 pi phase = 2*`M_PI*idtmod(freq, 0.0, 1.0, -0.5); V(out) <+ va*sin(phase); end endmodule |
Title: Re: VCO Phase Noise 40dB/dec instead of 20dB/dec in PNoise Post by Ken Kundert on Jul 8th, 2020, 4:18pm I don't see an obvious cause for your symptoms in the model you gave. The next step would be to plot the contributors to the VCO output noise to see if it can be attributed to wpn_osc. -Ken |
Title: Re: VCO Phase Noise 40dB/dec instead of 20dB/dec in PNoise Post by Hudson on Jul 9th, 2020, 12:43pm Hi Ken, Thanks for your reply. Yes, the contribution from the wpn_osc is 100% at 1MHz and 10MHz offset. I also checked the vn spectrum to be white. |
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