The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl Measurements >> Phase Noise and Jitter Measurements >> Phase Noise Accumulation in Restoring Circuits https://designers-guide.org/forum/YaBB.pl?num=1036411197 Message started by rf-design on Nov 4th, 2002, 3:59am |
Title: Phase Noise Accumulation in Restoring Circuits Post by rf-design on Nov 4th, 2002, 3:59am I had a problem some months ago with a divider specified for 8GHz and -158dBc noise floor in CML logic. I have used SpectreRF as a spot tool for phase noise measurement. The measurement result was that the estimated noise floor was far too optimistic and beeing about 20dB off the real measurement results. The phase noise analysis result every time in a noise summary which point to the output of the circuit. That could not be true because in a divider circuit there is a number of restoring stages in the internal logic. Each contribute to the phase noise or jitter of the total output. I have read a little bit about the used algorithm for PSS. To my limited knowledge the PNoise analysis is similar to spice noise analysis. Instead of noise analysing one DC oppoint a set of points belonging to periodic oppoint is analysed. For each of these periodic points the absolute value of the transfer function from a noise source to the output is evaluated. The limitation of that method seems to be that accumulation of jitter in the presence of delay is not accurate. And that seems to be because the analyis method operate point by point. Let give an example: Imagine a chain of simple CML inverters. Each contribute equal to the total phase noise. The periodic transfer function is peaking at the zero crossing of the differential input voltage. This peaking appears at the same time for all inverters if there is no delay between them. But with delay the peaking noise transfer functions are shifted by the delay. Because the algorithm works point by point the periodic transfer function from the first inverter to the output is nearly zero. That is my explaination for the given inaccurate results from SpectreRF. But there is still hope. The delay could be taken into account because the delay could be extracted from the phases of the first harmonic. If the algorithm would be modified by reordering the contribution in time domain respective the delay think SpectreRF will give more accurate results. Reiner Franke |
Title: Re: Phase Noise Accumulation in Restoring Circuits Post by rf-design on Nov 4th, 2002, 5:00am Thanks Ken, I read the theory explanation, http://www.designers-guide.com/Theory/cyclo-preso.pdf where chapter 36.0 gives a hint that the right analysis method is step by step. That is already supported by spice simulators which could do a AC noise analysis at a selected transient point. Is there some idea about a method including correlation? Reiner Franke |
Title: Re: Phase Noise Accumulation in Restoring Circuits Post by Ken Kundert on Nov 5th, 2002, 11:04am The SpectreRF noise algorithms are a good deal more sophisticated than you give them credit for, and are perfectly capable of handling the delay. If you are interested in learning more about them, try reading the following paper: Ricardo Telichevesky, Kenneth S. Kundert, Jacob K. White. Efficient AC and noise analysis of two-tone RF circuits. Proceedings of the 33rd Design Automation Conference, June 1996. I believe by reading it you will find that SpectreRF works much differently than you think. So then the question becomes, if SpectreRF noise analysis is accurate on dividers with delay, why did you get results that were far from measurement? I believe it is because you used SpectreRF to measure the time-average noise rather than the phase noise at the threshold crossings. This is actually the point of slides 36 and 36 in http://www.designers-guide.com/Theory/cyclo-preso.pdf. If you use the time-average noise, which SpectreRF produces by default, you include the noise produced by the output stage even when the output is not switching. This is why the noise from the output stage appears to dominate over the noise from other stages. I recommend that you follow the procedure described in http://www.designers-guide.com/Analysis/PLLjitter.pdf. -Ken |
Title: Re: Phase Noise Accumulation in Restoring Circuits Post by rf-design on Nov 5th, 2002, 1:06pm Dear Ken, I just read again my lab notes and take a look into http://www.designers-guide.com/Analysis/PLLjitter.pdf The proposed method in the above paper in chapter 4.1.1 exactly describe a step by step method. There is no reference to run SpectreRF to do the analysis of the complete circuit. My questions is what is the reason to propose a step by step method. I the real circuit the situation has two dimensions more complexity. First not every edge seen on the output of the divider belongs to the same restoring path. Second the step by step method involve noise folding with different bandwidths. I done finally a mixed simulation and hand calculation and combine the results in excel. The question remains how to do that in SpectreRF. Reiner Franke |
Title: Re: Phase Noise Accumulation in Restoring Circuits Post by Ken Kundert on Nov 5th, 2002, 9:39pm There are situations where you can simulate a complete PLL in SpectreRF and directly predict its phase noise. This case is covered in Section 1.2 of http://www.designers-guide.com/Analysis/PLLnoise.pdf. This reference indicates when you can, and when you cannot, directly simulate the phase noise of the whole PLL. I'm afraid I do not understand your comments about the different edges having different restoring paths (what is a restoring path?) and about the noise folding with different bandwidths. |
Title: Re: Phase Noise Accumulation in Restoring Circuits Post by rf-design on Nov 5th, 2002, 11:32pm Dear Ken, I have failed to simulate the phase noise of the divider complete in SpectreRF but understand that you advise that these analysis could not done. I have done my mixed simulation and hand calculation and come close to the physical measurement results. The explaination that edges depend on different restoring pathes is simple. Like every logic circuit also high frequency CML logic circuit have a critical path. These path could involve different logic gates or registers depending on the actual state. Because each of the gates or registers add jitter noise to the total output noise it could vary with the state. It appears only in more complex logic circuits. The second effect is noise folding. That mean that at the zero crosssing of the input of a restoring circuit the phase noise around the fundamental is impacted by white noise from multiply harmonics. So depending on the noise bandwidth and the fundamental frequency the ammount of noise folding is different. Reiner Franke |
Title: Re: Phase Noise Accumulation in Restoring Circuits Post by Ken Kundert on Nov 6th, 2002, 12:34am Reiner, I certainly did not mean to give you the impression that I felt that it is not possible to simulate the phase noise of a divider with SpectreRF. In fact, I believe the opposite, and I have described how to do so in my papers. And SpectreRF naturally addresses your concerns about noise folding because it is a full transistor level simulation that accurately accounts for folding. It sounds as if you expect the jitter associated with different edges to be different. I don’t see this as being a problem because it is possible to extract the jitter separately for each edge. -Ken |
Title: Re: Phase Noise Accumulation in Restoring Circuits Post by rf-design on Nov 6th, 2002, 3:57am Ken, I work with SpectreRF since 1995 and being familar with and like the advantages. SpectreRF fail in this particular case and I thought I know the reason why. I will prepare a small test case, which could start in a shell, and give a hand calculation beside. That should clearify the issue. Reiner Franke |
The Designer's Guide Community Forum » Powered by YaBB 2.2.2! YaBB © 2000-2008. All Rights Reserved. |