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Measurements >> Phase Noise and Jitter Measurements >> plotting simulated jitter of PLL
https://designers-guide.org/forum/YaBB.pl?num=1053814999

Message started by cupric on May 24^th, 2003, 3:23pm

Title: plotting simulated jitter of PLL
Post by cupric on May 24^th, 2003, 3:23pm

Hi!

I am a bit confused with the matlab code that has been provided in Ken's paper about jitter in PLLs. It has been described in the paper that the MATLAB code that implements Welch's method to compute the power spectral density of phi produces the output within a frequency range of fout/2 to fout/nfft.

For a case, where the VCO produces signals at 1GHz and I want to measure the phase noise at 100kHz and less, then I would have to use nfft in excess of 1e5 and more. (Assuming that I am sampling the zero crossings just at the output of the VCO and not after the frequency divider.)

Is my observation correct or have I misunderstood this portion of the paper.

thanks,
cupric.

Title: Re: plotting simulated jitter of PLL
Post by Jitter Man on May 27^th, 2003, 10:23am

I believe that in this case f_out is the scaled output frequency. Remember that in the example in the paper the divider is included into the VCO. The true output frequency would be 2GHz, but by including the divide by 10,000, the effective f_out becomes 200kHz. Thus, if you used 100,000 points, the output frequency range you would see is 1Hz to 100kHz.

[glb]Jitter Man[/glb]

Title: Re: plotting simulated jitter of PLL
Post by cupric on May 28^th, 2003, 8:14am

Hi JitterMan,

I couldn't understand what you meant by "if you used 100,000 points". If you meant that I should increase the number of zero crossing samples of the VCO, I did that and I don't find any change in the frequency range. Only a change in period of the VCO changes the range of the output frequency spectrum that is plotted by the matlab script given in the paper. This can be done by inserting a freuquency divider(FD) at the output of the VCO and then sampling the output of the FD instead of the VCO as has been done in Kundert's paper. But then, won't the results need to be scaled to remove the effect of the FD (as given in table 2 of the paper).

With regards to this, I have another question. In the last figure of the paper, where the simulated noise behavior of the PLL is compared with the noise spectrum of the individual components, is the stand alone noise spectrum of the VCO scaled to take into account the effects of the FD? I reach this conclusion because the noise spectrum of the simulated PLL has been plotted, as is, from the matlab script which incroporates the effects of the FD.

I am a bit confused. Please help.

thanks,
cupric

Title: Re: plotting simulated jitter of PLL
Post by Jitter Man on May 28^th, 2003, 11:57pm

Cupric,
Ignore my comment about the 100,000 points, I was off track on that.

Kundert indicates the displayed frequency domain is f_out/2 to f_out/nfft. f_out is the output frequency of the model, not the synthesizer, and nfft is a parameter given in the Matlab script. In this case, f_out = f_vco/N where N=10,000, and nfft=512.

Concerning your last question, I'm afraid I cannot answer. Perhaps Ken can explain the graph. But with DAC next week, it might take him a while to respond.

[glb]Jitter Man[/glb]