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Design >> RF Design >> varactor modelling
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Message started by Richard Albon on Nov 5^th, 2003, 11:08pm

Title: varactor modelling
Post by Richard Albon on Nov 5^th, 2003, 11:08pm

I am designing and rf circuit using a nmos varactor. The device is configured as a 11/1um x m in size with the gate as one capacitor terminal - biased at 1.75v. The second capacitor terminal is the source and drain which is held at either 3v or 0v (bulk is a constant 0v). The component is used with a 5 Ghz signal on the gate with nqs=1 bsim3v3 model in spectre. While the cv curve appears as expected for a varactor (5pf at 0v and
0.8pf at 3v on the drain), its Q goes from 8 at 0v to 360
at 3v. I believe the BSIM3v3 model does not handle the losses at 3v correctly and at voltage in between, since a similar component size for an accumulation mosfet
(nmos in nwell) using a behavioral model shows Q from 10 at 0v to 20 at 3v. The model here was curve fitted to
measured silicon. There is no silicon measurements to do the same for the nmos to build a behavioural model.
Is there a way of predicting what the Q response should be and how it can be modelled in the nmos

Title: Re: varactor modelling
Post by BSIM4 on Nov 25^th, 2003, 5:30pm

Did you put a substrate resistance on the NMOS varactor? Maybe this can help to reduce the Q at 3V?

Title: Re: varactor modelling
Post by wolf on Jul 1^st, 2004, 1:59am

Hi Richard,

I'm facing the same problem. I think that this is due to the design kit and not to the bsim model. It depends if the channel resistance is implemented or not. If i run an ac sim and plot 1/impedance at the gate of the nmos in fct of frequency, it behaves like a pure capacitor, which means that the channel resistor is not implemented.
Usually, vs=vd which means that the transistor is in the linear region. This situation is similar to a switch with
Ron=1/(beta*(Vg-vt-vbulk)
Except that this resistor is between drain and source instead of grid and bulk. However, for an approximation of the Q factor, this formula for the channel resistor should not be too far, what do you think?

Title: Re: varactor modelling
Post by City on Jul 7^th, 2004, 12:05am

Hi Wolf and Richard,

I faced the same issues in a 90nm CMOS process modelled with Bsim3v3. I believe that you may use the
Ron=1/(beta*(Vg-vt-Vbulk)) approximation when you enter the strong inversion only so that Q value will only fit part of the Q vs V curve. Q at weak and moderate inversion is lower so you I think that if you use Q at strong inversion only, this will over estimate the value.
Moreover, because the channel length is usually about 1Um to have good Cmax/Cmin ratio of the varactor, I think that you need use a RC distributed model for the channel resistor which give you approximately Rondistibuted = 1/12*Ron if I remember correctly from my calculations.