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Design Languages >> VHDL-AMS >> VHDL-AMS Error Messages
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Message started by Akalya on Nov 7^th, 2003, 3:52pm

Title: VHDL-AMS Error Messages
Post by Akalya on Nov 7^th, 2003, 3:52pm

Hi All,
I am working on a class presentation on VHDL-AMS and I am facing problems in compiling codes written in vhdl-ams. I used the codes given in the CD that came with the "System Designer's Guide To VHDL-AMS". I am using Mentor Graphics suite of software. The code passes the vacom stage but does not pass the vasim stage. The error message that I am getting is

#E Error: OPEN terminal port INP not implemented
# #E Occurred in design entity(ADMS/A2D_BIT_ELECTRICAL) at time 0fs #
# #E Error Loading Design

Any help in solving this problem would be greatly appreciated.

Thanks For U'r Time.
Akalya.

Title: Re: VHDL-AMS Error Messages
Post by shpong on Nov 26^th, 2003, 2:57am

Hi,

First I think you better refer to the version of AdvanceMS you are using since all these VHDL-AMS tools are still in early developpement and there are many differences between the versions.

I think you problem is coming from the fact that your input terminal has been left open and a open terminal is not yet (to my knowledge) implemented in AdvanceMS...

If not, could you please give more information : when you are trying to run the simulation (vasim) did you include your model in a testbench and so on....

Title: Re: VHDL-AMS Error Messages
Post by svs on May 26^th, 2004, 3:20pm

Seems like you have not connected the input terminal INP of your A2D converter. Connect it to something, rather than leaving the actual of the port as OPEN. This should fix your problem