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Simulators >> Circuit Simulators >> strategy for initializing swcap transient sims
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Message started by danmc on Dec 18^th, 2003, 9:13am

Title: strategy for initializing swcap transient sims
Post by danmc on Dec 18^th, 2003, 9:13am

Does anyone have a good general strategy for getting a good operating point for starting a transient analysis of a rather large circuit which contains many switched capacitor type circuits?

The issue I have is that there are things like switched capacitor common mode feedback circuits which take some time to settle and they don't really have a nice DC operating point when the clock is off. The result is I have to simulate quite a large number of clock cycles just waiting for the initial transients to die out. Things get even worse if there are even slower circuits involved such as an externally bypassed reference. I need to do a DCop analysis to get that converged or I'll never be able to simulate enough clock cycles to have it reach steady state.

For a schematic only sim, I can play tricks with controlled sources and large resistors to force the circuit to have a nice DC operating point, but if I try and use say an RC extracted netlist, I loose the ability to insert all of these bandaids.

I've tried things like running a dcop with liberal tolerances in spectre, writing out the result and then using that as a readic initial condition with skipdc=yes, but sometimes it doesn't take. i.e. the circuit behaves in the transient sim as though it was given an inconsistent initial condition. I've seen jumps of a volt on large (> 1uF) caps in the first time step.

Is spectre just the wrong tool for this job?

Title: Re: strategy for initializing swcap transient sims
Post by August West on Dec 18^th, 2003, 2:07pm

I think your best bet is to run a long transient simulation to find the steady-state solution, and then save the final state to a file using writefinal. Then on subsequent analyses you can use it as the initial state by using readic. Unless you have a specific reason for doing so, I would not recommend using skipdc. Using it increases the chances of a bad starting point if the circuit is modified in some way. You also have to be very careful to assure that the set of initial conditions you use is consistent with the input signals. In other words, if you use writefinal so save the circuit state when phi1 is high, and then use readic to read it back in when phi1 is low, you are going to get those jumps.

-August