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Simulators >> RF Simulators >> Phase noise and Jitter about VCO.
https://designers-guide.org/forum/YaBB.pl?num=1079361276

Message started by john>Z on Mar 15^th, 2004, 6:34am

Title: Phase noise and Jitter about VCO.
Post by john>Z on Mar 15^th, 2004, 6:34am

Excuse me, I read Ken's PDF but have some language problem I don't quite understand something.Could you explain to me simply that's very kind of you.There're some basic questions but really frustrated me.

1. I have a job to test what's the Jitter of a VCO working at 1G, but I am confused the phase noise have a unit dB/Hz, Hz is the offset frequence, and it can be converted to Jitter by a function.(Can't SpectreRF give out the Jitter directly?),then what's the offset frequence should I choose?I think Different offset frequence gives difference results.

2.If the output waveform is a little distorted,is the result of phase noise will be effected?

3.Ken gave some examples of Verilog-A models, I don't know whether the VCO model could be used to my 3 stage ring osc. by some little modification.

4.except for phase noise, any other noise speciality should be tested for a VCO?and how? ??? ???

Title: Re: Phase noise and Jitter about VCO.
Post by August West on Mar 15^th, 2004, 11:20am

1. If the phase noise is due to white noise sources, then the jitter that you compute using J = sqrt(cT) does not depend on the offset frequency because c = L(df) *(df/f₀)². Increasing the offset frequency df drops the value of L(df), but drop is countered by the fact that c includes the df² term.

2. The phase noise is not affected by the shape of the output waveform. The phase noise is effectively a noise in the phase or time variable, it serves simply to shift the entire waveform to the left or right slightly.

3. The VCO model given by Ken is generic. It can represent any VCO, though you may have to modify it somewhat if you want to model certain effects, such as nonlinearity in the transfer characteristics, or to produce multiple output phases.

4. You might also consider characterizing the power supply rejection. This would allow you to know how much of the noise on the supply is making its way to the output. You can measure it with the PXF analysis.

-August

Title: Re: Phase noise and Jitter about VCO.
Post by john>Z on Mar 15^th, 2004, 11:40pm

;D Thank you for your reply, there's still a question, after I tested every part of the PLL ,made models and put them together, how can I test the PLL's overall Jitter? Run pss+pnoise? But there seems no function in that PDF document, at the end of the pdf there is a example, but it only said "the period jitter of the PLL was found .....", I can't get to know "how to find?".
Maybe I should only test the VCO output Jitter?
And I saw the PD/CP jitter is 2ns , but the PLL jitter is 9.8ps, why?
It's my first time do this,so any reply is appreciated.