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https://designers-guide.org/forum/YaBB.pl Simulators >> Circuit Simulators >> Cadence Netlisting Error.... https://designers-guide.org/forum/YaBB.pl?num=1080075004 Message started by saumi9de on Mar 23rd, 2004, 12:50pm |
Title: Cadence Netlisting Error.... Post by saumi9de on Mar 23rd, 2004, 12:50pm Hi, I am working on Cadence ICFB, and had downloaded the PDK for tsmc 0.25u process. I am facing some problem with netlist generated by Cadence for the RF components in PDK library.The netlist generated by Cadence gives the name of these elements as "subcircuit" instead of the model name specified. Has anybody encountered this problem? Currently, I am getting over the trouble by manually editing the input netlist, but is it possible to do this by writing some Skill routine in Cadence? Please help me out! Thanks, Saumitra |
Title: Re: Cadence Netlisting Error.... Post by Andrew Beckett on Mar 23rd, 2004, 9:01pm Try doing: setenv CDS_Netlisting_Mode Analog before you start DFII. This is required to use the Analog Design environment, and if I remember rightly, not setting it results in the symptoms you're seeing for the spectre netlister (the spectre netlister can work with both nlp and CDF based libraries, but needs to know which mode it is in). Regards, Andrew. |
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