The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Measurements >> Phase Noise and Jitter Measurements >> divide by 2, then multi by 2, affect phase noise?
https://designers-guide.org/forum/YaBB.pl?num=1080230527

Message started by apple_fandai on Mar 25^th, 2004, 8:02am

Title: divide by 2, then multi by 2, affect phase noise?
Post by apple_fandai on Mar 25^th, 2004, 8:02am

Hi,

I design a PLL. If I add a divid by 2 and a multiply by 2 circuit at the output of VCO, the frequency relationship of PLL don't change. Is it harmful to phase noise of PLL? How these two circuits will affect the phase noise of whole PLL?

Thanks! :)

Title: Re: divide by 2, then multi by 2, affect phase noi
Post by Andrew Beckett on Mar 28^th, 2004, 11:23am

Well, unless the divider and multiplier are noiseless,
I'd have thought that was obvious?

Andrew.