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Modeling >> Behavioral Models >> Topic on design reuse with aid of VerilogA/AMS
https://designers-guide.org/forum/YaBB.pl?num=1081791094

Message started by fastsim on Apr 12^th, 2004, 10:31am

Title: Topic on design reuse with aid of VerilogA/AMS
Post by fastsim on Apr 12^th, 2004, 10:31am

I know this is really a topic related to many aspects of design
methodology and implementation. But should we at least have
a new category that focus on the issues.

From academic and theoritical point of view, analog/mixed-signal
behavioral modeling is definitiely the way to go for the future. But
in the real IC design world, without any well-thought-through methodology and practical flows that tie the modeling part and
circuit design part seamless and painless together, pushing for analog/mixed-signal behavorial modeling can be a frustrating and fruitless job.

I firmly believe in the real value and benefits that the languages (Verilog-A/AMS, VHDL-AMS, SystemC, etc.) can bring on the table. However, since this is such an open field ( with respect to so many things and so many ways you can do design) and it is hard to see the immediate real value in short of time, discussions on the methodology, analog IP reuse might help people to understand and convince other people ( managers, directors, VPs, etc.).