The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Measurements >> Phase Noise and Jitter Measurements >> accumulated jitter at the pll output
https://designers-guide.org/forum/YaBB.pl?num=1087809489

Message started by seb on Jun 21^st, 2004, 2:18am

Title: accumulated jitter at the pll output
Post by seb on Jun 21^st, 2004, 2:18am

hi people,
in "modeling and simulation of jitter in pll frequency synthesizers", part "simulation and analysis", ken explains how to compute the phase noise of the closed loop pll, but in fig 11, he also plots the long time jitter Ji of the closed loop pll.

Is it computed from the phase noise ? from the length of the periods ?
as it's a statistic value, the "normal" way would be to do a lot of runs but i'm sure there's an easiest way i miss... i mean i see how Ji is related to the phase noise for a free running vco, or for an open loop CP (in which case it's constant), but for the output of the closed loop pll i'm a bit confused ! ???

thanks for answering me, and sorry if the question is too obvious ! ;D