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Design >> Mixed-Signal Design >> How do I prepare a hard IP?
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Message started by ywguo on Aug 10^th, 2004, 1:32am

Title: How do I prepare a hard IP?
Post by ywguo on Aug 10^th, 2004, 1:32am

Hello,

When we integrate a hard IP, eg. PLL, XOSC, ADC, into a SOC, what should I do to prepare the database for behaviorial simulation, physical verification, synthesis, and P&R?

Maybe that is a too big question, for it involves many tools and different design flow. Anybody has good reference about detailed method to generate the files, eg. lef, tlf, v, .lib, etc.?

Thanks

Yawei

Title: Re: How do I prepare a hard IP?
Post by ywguo on Aug 16^th, 2004, 1:11am

Hi,

I thought I should write a .lib file firstly. Then the .db file could be generated using library compiler of synopsys.

But how do I write a .lib file?

Yawei