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Design Languages >> Verilog-AMS >> Simulation related query
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Message started by Vivek Chandrasekhar on Nov 5^th, 2004, 10:17am

Title: Simulation related query
Post by Vivek Chandrasekhar on Nov 5^th, 2004, 10:17am

HI,

I am presently doing transient analysis on my schematic design in Verilog AMS with ldv 5.1. I would like to know how to go about doing dc analysis on the same design.
Thanks
Vivek

Title: Re: Simulation related query
Post by prabal on Nov 22^nd, 2004, 9:58pm

Hello Vivek,

Can you be a bit more specific about your goal ?

- Prabal.