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Design >> Analog Design >> Folded Cascode Design
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Message started by venusgarg on Nov 8^th, 2004, 9:40am

Title: Folded Cascode Design
Post by venusgarg on Nov 8^th, 2004, 9:40am

Hi
i am designing a Double folded cascode amplifier, but i am not getting a positive Gain plot and i have checked the operating points of my transistors they are all saturated.
Can someone please help me how to increase the current through design and also what will be a V_t of the transistors if i am stacking 4 transistors from V_dd to G_nd

if someone knows anything about this please help me

Venus

Title: Re: Folded Cascode Design
Post by sheldon on Dec 10^th, 2004, 6:18pm

Venus,

Could you provide more information about your design? In
general, the issue when stacking cascoded devices is the Vds
not the Vt. There are techniques for designing low overhead
current mirrors, see Johns and Martin's book for more
details. It was not mentioned, are the input devices included
in the cascode stack? It may also help to separate the input
stage from the gain stage, for example use a differential
input stage with a folded cascode gain stage.

Sheldon

Title: Re: Folded Cascode Design
Post by venusgarg on Dec 10^th, 2004, 8:05pm

Hi
thanks for your reply
I am done with my design of double folded cascode amplifier design but i am not satisfied with gain of an, can you please guide me how to increase the gain of an amplifier, i am using differential cascode input stage and CMFB at one output and taking output from other leg of the amplifier and also my Vout/Vin vary with input signal when it varies from 1mA to 100mA, is it OK or something is wrong and please also tell me how to increase the gain of an amplifier

Venus

Title: Re: Folded Cascode Design
Post by sheldon on Dec 18^th, 2004, 6:52pm

Hi,

Still can't quite understand the circuit architecture,
so it is difficult to answer in detail. One comment, is
that open loop gain is relatively insensitive to bias
current. For example, for a bipolar transistor:
transconductance is gm = Ic/Vt and output resistance is
ro= Va/Ic so the gain is Av = Va / Vt. To increase gain,
alternative architectures are required. For example, using
a cascode increases the output resistance, ro~Bo*Va/ Ic.
So gain becomes Av = Bo * Va / Vt. MOS transistors have
similar characterisitics, that is, increasing bias current
does not usually increase gain. Since you are already
using cascodes, the next step is to use regulated
cascodes(gain boosting).

Sheldon

Title: Re: Folded Cascode Design
Post by venki_vlsi on Mar 18^th, 2005, 4:53am

hi
inrease the lengh of m1 and m2(input applying transisitor) by 3-5 times to increase gain.u can also increase by increasing the width of load transisitors which r near vdd if u use n-type differential ckt input otherwise near gnd for p-type differential ckt.u can also do two stage cascode but u have to apply compensation.
ok bye