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https://designers-guide.org/forum/YaBB.pl Design Languages >> Verilog-AMS >> PFD phase domain model https://designers-guide.org/forum/YaBB.pl?num=1109556439 Message started by Tommy on Feb 27th, 2005, 6:07pm |
Title: PFD phase domain model Post by Tommy on Feb 27th, 2005, 6:07pm Hi, I want to simulate lock-up time of a PLL using phase-domain models. I am thinking of writing a Charge-pump/PFD model to do this. Any suggestions & help are most helpful & welcome. Thanks Tommy |
Title: Re: PFD phase domain model Post by gogomi on Feb 28th, 2005, 11:20am Hi, Tommy, I am working on phase-domain modeling too. You can refer to the pll library paper from Cadence. But I think if you would like to make a use of it, you probably need to make some modifications on the codes. You can find the paper at www.cadence.com/whitepapers/pllapp_note.pdf gogomi |
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