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Design >> Analog Design >> Re: Deciding the Bandwidth of PLL
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Message started by boa on Apr 21st, 2005, 9:18pm

Title: Re: Deciding the Bandwidth of PLL
Post by boa on Apr 21st, 2005, 9:18pm

Dear hchanda,

There's plenty of information about PLL in the internet. For example, check the lecture slides by Prof. Phillip Allen at http://users.ece.gatech.edu/~pallen/Academic/ECE_6440/Summer_2003/ece_6440_su2003.htm

In brief: PLL bandwidth is a trade-off between spur and out of band phase suppression and PLL lock time.

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