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Design >> RF Design >> question on RF pad design
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Message started by analogic on May 3^rd, 2005, 1:30pm

Title: question on RF pad design
Post by analogic on May 3^rd, 2005, 1:30pm

i m trying to design some pads (analog input, analog output) for GHz operation.

the parasitics introduced by ESD diode and pad metal, pin, bonding wire make the distortion unacceptable.

Can any one tell me how they handle the problem in commercial chips?

Thanks.

Title: Re: question on RF pad design
Post by Sid on May 24^th, 2005, 7:50pm

I do not have too much RF experience, but I can take a guess at some potential ways to reduce your pad/package parasitics.

1. Try to use "deep-trench isolation" under your pads if available in your process.

2. Do not use ESD devices on the analog pads and handle wafer testing in a controlled environment if possible - however it is best if you use at least some minimal ESD protection.

3. Avoid using bond-wires (i.e. no packaging) and use high-frequency RF probes for testing - these probes are typically gnd-signal-gnd probes for high-performance. Else you may want to use flip-chip packaging.

-Sid