The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design >> Analog Design >> question on NMOS vs. PMOS
https://designers-guide.org/forum/YaBB.pl?num=1115223850

Message started by analogic on May 4^th, 2005, 9:24am

Title: question on NMOS vs. PMOS
Post by analogic on May 4^th, 2005, 9:24am

In Razavi's "design of analog IC" book P37,
it is claimed that "for given dimensions and bias currents, NMOS transistors exhibit a higher output resistance, providing more ideal current sources and higher gain in amplifiers".

However, i simulated a NMOS and a PMOS, both biased in saturation region with same Ids and similar Vds, same W and L. gds of PMOS is smaller than NMOS, which means NMOS has lower output resistance.

Can anyone tell me why my simulation is different from the book's conclusion? i was using tsmc0.18CMOS

thanks.

Title: Re: question on NMOS vs. PMOS
Post by James on May 6^th, 2005, 4:40am

I think the output resistance should be ro, which equals to 1/lambda*Id. For lambda, NMOS is much smaller than Pmos, so, ro is higher for nmos than nmos.
If I'm not right, plz correct me.

Title: Re: question on NMOS vs. PMOS
Post by analogic on May 9^th, 2005, 6:17pm

"For lambda, NMOS is much smaller than Pmos"

-- from my simulation, the lambda of NMOS is larger than that of PMOS

Title: Re: question on NMOS vs. PMOS
Post by aamar on May 12^th, 2005, 5:05am

The resistance is dependent on the dimensions of the resistor.
The resistance in your case is the MOS channel. so you should insure that the effective channel length is the same.
At saturation the pinch-off region spreads into the channel, and this is dependent on both Vgs and Vds.
you say that you are using the same Vds but what about the Vgs, they are different in both transistors inorder to have the same current flowing (the mobility is different in n than p material) .
And in accordance it is expected that it will be higher in PMOS, and accordingly shorter pinch-off region for the same Vds, and longer resistive channel region, describing the higher resistance you got for the PMOS over the NMOS.
You must also check if the PMOS is still in saturation region or not.

Title: Re: question on NMOS vs. PMOS
Post by sheldon on Jun 2^nd, 2005, 5:40am

Analogic,

One other point to consider, there may be some
assumptions in the Razavi's statement. For example,
is Razavi discussing NMOS transistors built is a digital
process, n-well on p-substrate, or NMOS transistors
built in a BiCMOS process, p-well in n-epi. The process
can also effect the relative device characterisitics.

Best Regards,

Sheldon