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Design Languages >> Verilog-AMS >> PSS convergence of a VCO with a divider
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Message started by tromeros on May 29^th, 2005, 1:29am

Title: PSS convergence of a VCO with a divider
Post by tromeros on May 29^th, 2005, 1:29am

Hello,
I have designed a ring oscillator followed by a frequency divider which is described using the Verilog-a language. It is the same divider presented in the paper "Hidden state in SpectreRF". The PSS analysis of the oscillator alone works fine. The PSS analysis of the divider with a sinusoidal input signal works also fine. However when I combine the two blocks together I get convergence error and never achieve a steady state. I have set a stabilization time (tstab) but I don't get succesful results. I wonder what is wrong. Thanks in advance.
Tromeros :)

Title: Re: PSS convergence of a VCO with a divider
Post by Andrew Beckett on May 31^st, 2005, 10:46am

First of all, I assume you're using PSS in autonomous mode (i.e. checking the oscillator checkbox on the PSS form, and pointing at the output of the divider) - or from netlist level, using:

mypss (divideroutp divideroutn) pss ...

If you're doing that, are you using a recent IC5033 or IC5141 subversion? There were some problems a few months back where the oscillator mode stuff was not working that well for a while - although I think wasn't so much convergence difficulties but actually converging on a multiple of the period.

Regards,

Andrew.