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Message started by kella on Jul 10th, 2005, 4:29am

Title: how to design spiral inductor?
Post by kella on Jul 10th, 2005, 4:29am

Hello friends

I have designed an UWB LNA in Agilent ADS with ideal inductors. Now I have to replace the ideal inductors with real ones using momentum.

I need some tutorials or lecture notes on designing the inductor. I can not choose the inductors from the Agielnt ADS library as I have to design spiral inductor myself.

Waiting for your replies.

thanks.

/Kella

Title: Re: how to design spiral inductor?
Post by river on Sep 10th, 2005, 10:02pm

You can use ASITIC.
visit http://rfic.eecs.berkeley.edu/~niknejad/asitic.html
for details.

Title: Re: how to design spiral inductor?
Post by Paul on Sep 11th, 2005, 1:05pm

Thomas H.Lee's book "The Design of CMOS Radio-Frequency Integrated Circuits" has a nice explanation of the trade-offs in integrated spiral inductor design, as well as the design equations.

Paul

Title: Re: how to design spiral inductor?
Post by ssupin-ma on Sep 12th, 2005, 9:26pm

Another book from Ali M. Niknejad, who design the ASITIC, is inductors and transformers for Si RF ICs. There are more detail discussion for on Silicon inductor. That may help you.

:)

Title: Re: how to design spiral inductor?
Post by bobm on Oct 18th, 2005, 9:23am

The design of a spiral inductor deals with first what semiconductor process  you have to work with. The PDK or Process Design Kit should describe the process. This would allow you to determine  the metal and dielectric layers you have at your disposal. Also, it should tell you what structures are proven in that semiconductor process. However, it is not uncommon for custom structures to be designed. Next, you need to decide on the criticality of L and Q for a given footprint area. Inductors are the largest devices on-chip and often one wants high Q for a given L to acheive a lower power dissipation. In some cases, lower Q is OK when used for degeneration in a circuit.

Following all of these choices, often today to achieve high Q, spirals are designed with multiple layers (up to 3) and are symetical in design with parallel paths to leverage mutural coupling and thus more L and high Q for a given area. More than 4 layers will likely not result in an efficent structure.

In order, determine what geometry is ideal you will need an advanced EM solver (and not the free one from university)  to compare and make trade-offs which can include what shape, ground shield, etc... Depending on your frequency, you will need an EM solver than can model well skin effects, dispacement currents, ground effects, and handle complex shapes, especially cross-overs.

:D

Title: Re: how to design spiral inductor?
Post by ssk_288 on Oct 21st, 2005, 10:52pm

Hi

If you have access to IEEE then you can read the following paper
"A 1.8-GHz CMOS low-phase-noise voltage-controlled oscillator with prescaler
Craninckx, J.; Steyaert, M.S.J.;
Solid-State Circuits, IEEE Journal of
Volume 30,  Issue 12,  Dec. 1995 Page(s):1474 - 1482 "

It deals with issues regarding the on chip spiral inductor design.

regards
SUDHIR

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