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https://designers-guide.org/forum/YaBB.pl Design >> Analog Design >> Questions for"A Test Bench for Diff Circuits& https://designers-guide.org/forum/YaBB.pl?num=1121504271 Message started by ethan on Jul 16th, 2005, 1:57am |
Title: Questions for"A Test Bench for Diff Circuits& Post by ethan on Jul 16th, 2005, 1:57am Hi everybody, When I built a test bench for my differentail fold-cascode OTA according to figure 6 in Ken's paper, I added two load capacitors right before the output Balun and disconnected two voltage sources (Vod and Voc) to leave output Balun "d" and "c" two terminals floating (since I thought there is no buffer in my OTA, it can only drive capacitance). Question 1: for open loop gain simulation: According to figure 6 of Ken's paper, I set one input sources (vsource) Vid with AC magnitude 1v, plus I added a small signal amplitude for transient parameter. Then, for another input source (vource), I set (in the first case) Vic with "DC voltage" =2.5v (which is VDD/2), I found the open loop gain is about 5500, plus perfect common-mode level for all inputs and outputs and perfect peak-to-peak swing for transient; in the second case, I set Vic with all zeros ("DC voltage"=0 or none), then the open loop gain is only 4800 (and the common-mode level for the output is not Vdd/2, it sits at zero level). In the third case, which is the traditional way, I directly attached vsources to differential inputs of the OTA and get the differential outputs AC results. In this way, I found the open loop gain is 3700. Can anyone give me help to solve these conflictions? I am 100% sure the results and the measurments I did, since I have done several times for each case and couldn't figure out why. Question 2: for closed-loop gain and loop gain, CMFB stability Since my OTA is single stage without buffer, I only can use the configuration which is shown Ken's book --The Designer's Guide to Spice and Spectr, on page 119, figure 3.41 (with capacitive feedback for the fully-differential CMOS opamp). Am I right? But I am not quite understanding that, in that figure, there are two "isource". What's the their function in that configuration? Plus, how can I measure Loop Gain by using either the structure (on book) or that figure 6 (on paper)? Third, how can I check the CMFB stability based on these test benches? I couldn't figure out the ways how to do these. Please excuse me for my retard. Question 3: If I use SC CMFB for my OTA, can I still use the test bench shown in figure 6 on paper to do PSS and PAC, PXF, PNOISE (or either use capacitive feedback test bench and do those)? Please guide me. I really appreciate your help. Ethan |
Title: Re: Questions for"A Test Bench for Diff Circu Post by sheldon on Jul 16th, 2005, 7:33am Ethan, For question #1) a) You need to understand the concept of input common mode range. Rail-to-rail operation is a special requirement and not all op-amps operate this way. Also input common-mode range can describe the behavior of the differential mode parameters: gain, input impedance, input bias current, ... Don't know of a standard definition of input common mode range for open-loop gain. In the old days, bipolar designers would define the input common-mode range in terms of the input bias current source, tail current, falling to half of the nominal value. More recently, people seem to use the point where the open loop gain is 3dB down from the nominal value. It does not appear that there is a conflict. In case 1 the common-mode level is VDD/2 and in case 2 the common-mode level is 0. Different common-mode levels, different open loop gains. In case 3, it does not appear that you are defining a common-mode. So the comment would be to try this testbench while forcing the common-mode level and then compare it to the other results. Since all these measurements are being performed open-loop, the cavaets from page 76 apply. It would be better to use the approach you discuss in question 2. Also note the example circuit has +/- 5V supplies so ground is equivalent to VDD/2. In addition, the example circuit has a continuous-time CMFB loop to keep the output voltage at mid-range[ground level]. For question #2) a) you will probably need to add two switches, one across each of the feedback resistors. Use the Spectre ideal switch. You will need to set the switch to closed for the dc operating point and to open for ac analysis. As described in the netlist on page 121, the current sources are used for measuring output differential and common-mode resistance. To measure open loop gain using the testbench from figure 3.41, (pout - nout) Avo= ----------------- ( pvg - nvg) using the net names from the netlist on page 121. Using the testbench from figure 6, Avo = dout, where dout is the differential output terminal. Measuring the CMFB stability is described in Ken's book. Basically, if you use the testbench in figure 6, then plot gain and phase of the voltage at the common-mode terminal. Using figure 3.41, you should be able to plot the common-mode gain and phase of the amplifier. ( pout + nout) Avc = ------------------- ( pvg + nvg) 3) You might want to try just tricking the common-mode feedback circuit. That is use the ideal switches to simulate the feedback loop's operation. Set the to one state for the dc operating point and calculate the initial conditions, then flip the switches for the ac analysis. Never tried it but it might work. You could also try PSS analysis but it may not be valid. You need to perform the calculations in the time domain. That is, you need the PAC/PXF results at a particular point in time and this may not be supported right now. Best Regards, Sheldon |
Title: Re: Questions for"A Test Bench for Diff Circu Post by ethan on Jul 16th, 2005, 12:12pm Hi Sheldon, Thank you for your prompt reply. Your instruction help me lots. But I still have several points not so clear. Would you mind looking at them? First, I take your comment for "Different common-mode levels, different open loop gains", hence, the first case gain should be different with the second one. Then, between 1st case and 3rd case, I apologized that I did something wrong by myself in schematic. They are same for openloop gain. So I misleaded everybody. Second, I am not clear with CMFB stability measurement which you mentioned. I should mention that I already integrated my continuous CMFB inside with OTA and made one symbol with two inputs and two outputs for test bench. According to your instruction, the common-mode gain and phase plots (either from figure 6 or from figure3.41) will be shown the CMFB stability, right? But I know there is closed-loop gain, loop gain, common-mode loop gain and might be CMFB loop gain, too (I am not sure). which detemine the CMFB stability? With your comments above, I think, for my OTA, the CMFB loop gain will be just idential with the common-mode loop gain (or identical with some else in these test benches?) to determine the CMFB stability, right? Can you give me further instruction and clarify my confusion here? Thank you so much for your time. Ethan |
Title: Re: Questions for"A Test Bench for Diff Circu Post by ethan on Jul 16th, 2005, 4:19pm Hi Sheldon, I still need to ask you two further questions. 5. I didn't see the CMFB stability discussion in Ken's book. Can you tell me which pages for that in that book? 6. In your reply regarding my third question in the very beginning post, I am not quite clear: > .... just tricking the common-mode feedback circuit....... but it might work.> So, you meaned that I should seperate my SC CMFB with OTA and put into that testbench and also use all switches with ideal switch to do the rest measurement? ethan |
Title: Re: Questions for"A Test Bench for Diff Circu Post by sheldon on Jul 22nd, 2005, 8:13am Ethan, You may want to refer to the following white paper, www.cadence.com/whitepapers/FVofDiffOpAmp_wp.pdf You are correct about the CMFB stability not be discussed directly. On page 124, the transfer functions are shown for different sources. If the block had included a reference voltage source for ht eCMFB loop, then its frequency response would have been plotted. Best Regards, Sheldon |
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