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Design >> Analog Design >> Opamp DC Gain for pipelined ADCs
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Message started by vivkr on Jul 27^th, 2005, 7:08am

Title: Opamp DC Gain for pipelined ADCs
Post by vivkr on Jul 27^th, 2005, 7:08am

Hi all,

I would like to know if there is a concrete rule for settling the DC gain requirement on opamps used in pipelined ADCs. While I am aware that the DC gain is typically set at par with the ADC resolution (for the first stage) , I am not entirely convinced of the need for this.

For instance, say a 14-bit ENOB ADC would have an SNDR of about 84 dB. Does this necessarily mean that the first opamp has a gain of the same order (depending on the feedback factor)?

Is it not possible to use an amplifier with a lower DC gain but good enough linearity? Various papers just say that the DC gain must be set thus but do not explain why. If I assume just a linear opamp, the finite gain seems to add a gain error to the system, which may be tolerable in some cases.

Thanks
Vivek

Title: Re: Opamp DC Gain for pipelined ADCs
Post by daijiatang on Jul 27^th, 2005, 11:31pm

Hi, 1/2 LSB is the error tolerance for the ADC. Thus, each error should obey the above guideline. We discuss the opamp's finite gain and allocate error budget for it, which is based on the opamp used in negative feedback.
If you can find an amplifier with lower gain but good linearity, you should make sure the linear range can cover the signal swing.

Title: Re: Opamp DC Gain for pipelined ADCs
Post by Paul on Jul 28^th, 2005, 12:17am

Vivek,

Just to be sure, you are talking about the amplifier in the gain stage of the pipeline converter, right? Its closed-loop gain is very critical in the correct operation of the amplifier, because unlike the A/D part, there is no alternative path to correct for this error. As it affects the value of the error signal delivered to the next stage, I believe it does not only contribute to gain error, but also to non-linearity.

For details on calibration of interstage gain errors, you can read the following papers:
Digital-domain calibration of multistep analog-to-digital converters
Lee, S.-H.; Song, B.-S.;
Solid-State Circuits, IEEE Journal of Volume 27, Issue 12, Dec. 1992 Page(s):1679 - 1688

Interstage gain proration technique for digital-domain multi-step ADC calibration
Seung-Hoon Lee; Bang-Sup Song;
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
Volume 41, Issue 1, Jan. 1994 Page(s):12 - 18

Paul