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Other CAD Tools >> Physical Verification, Extraction and Analysis >> problem for big circuit extraction
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Message started by lily on Jul 27^th, 2005, 1:17pm

Title: problem for big circuit extraction
Post by lily on Jul 27^th, 2005, 1:17pm

I am trying to extract a very big layout using Cadence diva extract. And I got the "insufficient memory" problem. I even tried to modify the divaEXT.rul to ignore those RCs, but still cannot get it passed. :(
My system already got 16GB M+13 GB virtual M. Is there any option in the tool for less memory consumption? or any better way that I can try to extract this circuit?

Thanks a lot!

Title: Re: problem for big circuit extraction
Post by Paul on Jul 28^th, 2005, 12:31am

Hi Lily,

try google for
comp.cad.cadence +"diva" +"large circuits"

Although you don't specify the size of your design, these posts are quite explicit, Diva is probably not the right tool for full-chip extraction. Do you have Assura or Dracula available for such a job?

Paul

Title: Re: problem for big circuit extraction
Post by lily on Jul 28^th, 2005, 3:54pm

Hi Paul,

Thanks for your reply! We only got the divaEXT.rul from the PDK. We do have Assura but I don't know how to use it if we just have the diva rule file.

Title: Re: problem for big circuit extraction
Post by Paul on Jul 29^th, 2005, 2:32am

Lily,

Assura is able to work with Diva rules (it may require some modifications though, I think). However, I never tried it. Have a look at the Diva to Assura Migration Guide in the Assura installation documentation.

Good Luck

Paul

Title: Re: problem for big circuit extraction
Post by lily on Jul 29^th, 2005, 1:05pm

Hi Paul,

Thank you so much! I will look at it.

lily