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Design >> High-Power Design >> Learn about system level design of SMPS
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Message started by hardings on Aug 3^rd, 2005, 4:34am

Title: Learn about system level design of SMPS
Post by hardings on Aug 3^rd, 2005, 4:34am

I am wondering how to analye the AC characterof switch mode power supply ?

Normally I use the first order model, which is voltage controlled current or voltage to model the power stage,
and then use bode plot to analyse AC character by hand or EXCEL.

But AC analysis result can not fit the transient simulation?

Sometime I analyse the system level this model, and get very good result, but when I run transient simulation, the system go to unstable.

I read the topic by Eugene, it is wonderful, but I am still
not sure about it.

Can you give me some advice?

Title: Re: Learn about system level design of SMPS
Post by Jess Chen on Aug 3^rd, 2005, 10:57am

The small signal models one uses for AC analysis are derived from large signal models that are easily implemented in VerilogA. The large signal models can predict some kinds large signal instabilities. If you do not have access to VerilogA, literature exists from the 70s and 80s on how to build large signal time-invariant (or state space averaged) behavioral models of switch-mode power supplies from SPICE primitives. Look for papers by Vincent Bello. I wrote a few too. I can even recommend a book on the topic but I am not sure it is still in print. The nice thing about time-invariant models is that you do not have to simulate at the switching frequency. Of course, that means you could miss some instabilities.

To offer more help, I need to ask a few questions:

1. Are you working with resonant or PWM converters?

2. Are you using current mode control?

3. Are you paralleling current mode supplies?

4. Does the instability result in a latch-up or a limit cycle?

5. If it is a limit cycle, is it at half the switching frequency?

6. How close to half the switching frequency does your loop gain cross unity gain?

7. What is the gain margin and phase margin?

8. Is this the supply built from discrete components or is it all on an IC?

9. Are the AC and transient circuits really the same? It is easy to forget to include discrete EMC filters in the AC analysis.

10. Is your transient simulation a brute-force (i.e. pulse-by-pulse) simulation?

11. If you are using discrete components, does your transient simulation use saturating cores for the magnetics?

Title: Re: Learn about system level design of SMPS
Post by hardings on Aug 4^th, 2005, 6:22pm

Thank Jess for your reply, answer your questions

1. voltage mode control standward PWM
2. The unstable frequency is much lower than half of the switching frequency.When output current is small, the chip can work , when output current is large, the output voltage is unstable----ringing in a low frequency, when output current increase more, the chip will enter into large signal unstable ( Error Amplifier works in the rail to rail)

3. The bandwidth is designed to 1/10 of switching frequency, but this is done by hand analysis ( bode plot)
Gain margin is about -10dB, and phase margin is about 60 oC, of course these two parameter will changed if the output current is changed, but I analyse bode plot ,
when the AC analyse said gain margin and phase margin is OK, then I do transient simulation, it is unstable, I think it is because the analysis by bode plot is not accurate, so I want to get better model.
4. It is all on a IC, I am a IC designer.
5. No EMC filter , it is a DC/DC converter
6.I simulation is pulse by pulse by Hspice
7. No saturaion model for inductor

Title: Re: Learn about system level design of SMPS
Post by Jess Chen on Aug 5^th, 2005, 8:19am

It does indeed sound like your AC analysis missed something. From what you've said, it sounds like your AC analysis neglected an input filter, a filter in front of your switch mode power supply. The original paper on smps modeling by Middlebrook and Wester goes into the details of the interaction between the input filter and power supply. In short, for stability, the ouput impedance of the input filter must be less than the input impedance of the smps. To compute the input impedance of the smps you must treat the switching elements as a transformer with a variable turns ratio. This is a ficticious transformer since it works at DC. The "turns ratio" is related to the switch duty cycle. The exact dependence varies with topology. For a buck converter, the turns ratio equals the duty ratio. You linearize the transformer model to facilitate AC analysis of the impedance. I have to run now but if you still have questions I can elaborate.

-Jess

Title: Re: Learn about system level design of SMPS
Post by hardings on Aug 5^th, 2005, 6:55pm

Jess, I am talking about DC/DC, not AC/DC, normally there is only a capacitor connected to input, for AC/DC, we need better filter because of EMI.

And about the model by artificial transformer you have talked, it is the first order average model, I am not very sure it is good enough to analyse AC

Title: Re: Learn about system level design of SMPS
Post by hardings on Aug 5^th, 2005, 6:56pm

continue....

I am not very sure that it can be used to analyse AC

Title: Re: Learn about system level design of SMPS
Post by hardings on Aug 5^th, 2005, 7:00pm

Sorry, I click wrong key.

I am not very sure it can be used to analyse AC characters very accurately, I know the turn ratio for different topology, but which model is accurate enough?
the 1st order, state space , sample model or other model I did not know yet?

Title: Re: Learn about system level design of SMPS
Post by Jess Chen on Aug 5^th, 2005, 11:22pm

I know you are dealing with a DC/DC converter. The transformer I spoke of is a second order model for large signals and that is as high an order as you need. You can linearize it for AC analysis. You will find that the analysis depends on the operating point, which might very well explain why your system goes unstable at higher loads.

However, we must first clarify exactly how in your transient model you are driving the smps. If you are driving it from an ideal voltage source, the capacitor on the input is irrelevant; anything in parallel with an ideal voltage source is irrelevant. So the question is, exactly how are you supplying power to the switch and catch diode? If you are really driving it with an ideal source, the AC analysis you described should accurately predict the behavior of your transient analysis.

I should ask one more question: is your converter a boost, buck, or buck/boost converter? As I recall, the boost ( and buck/boost I think) topologies have a right half plane zero (predicted by the linearized state space averaged models!) that draws the close loop poles into the right half plane at large loop gains.

As for the accuracy of the state space averaged models, if your crossover frequency is less than 1/10 the switching frequency, the state space averaged models should be quite accurate. They have been applied successfully for over 30 years. You only need the sampled-data models if the bandwidth of your loop starts approaching half the switching frequency. And then, the oscillation frequency usually falls right at half the switching frequency. You mentioned that the oscillation was at a low frequency. The models should be especially accurate when compared to a brute force simulation. The only trouble I've had with models, state space averaged or brute force, is when I compared the results to lab measurements and the errors in those cases were due to uncertainties in the component values. In your case, since you have complete control over the component values in both models, the results should agree very well below 1/10 the switching frequency.

Where are you located? If the phone call is not too expensive, I can fax you the Wester/Middlebrook paper if you don't already have it. It may be hard to find since it has been 33 years since it was published. Otherwise I can snail-mail it to you if you send me a mailing address.

Title: Re: Learn about system level design of SMPS
Post by hardings on Aug 6^th, 2005, 3:44am

Thank Jess a lot for your kindly help!

Actually, we are in the two sides of the earth, I am from China, and now I am on my bussiness trip, you can send me by email: fortune1999@263.net

I did not use sencond order model for inductor, but I drive the inductor and diode by ideal voltage source. and I already inclued the RHP zero in the bode plot.

Thanks again.

Title: Re: Learn about system level design of SMPS
Post by Jess Chen on Aug 6^th, 2005, 10:10am

Hi Hardings,

Unfortunately, I do not have an electronic copy of the paper. I will keep my eyes open for a scanner. If I find one, I'll scan the paper then email it to you. If you have access to achival files, here are the key references:

G. W. Wester and R. D. Middlebrook, Low Frequency Characterization of Switched Dc-to-Dc Converters, Proc. IEEE Power Electronics Specialists Conference, 1972 Record.

R. D. Middlebrook and S. M. Cuk, A General Unified Approach to Modelling Switching Converter Power Stages, Proc. IEEE Power Electronics Specialists Conference, 1976 Record.

S. M. Cuk and R. D. Middlebrook, A General Unified Approach to Modelling Switching Dc-to-Dc Converters in Discontinuous Conduction Mode, Proc. IEEE Power Electronics Specialists Conference, 1977 Record.

Drs. Middlebrook and Cuk had a consulting company called TESLAco. It may still be there. I found a website for TESLAco. They may still sell their books, which are collections of papers, including the ones I listed.

http://www.teslaco.com/teslaco.html

Also, the second order model I referred to was not for the inductor, it was for the average switch/diode behavior. If you tell me the basic topology you are using, buck, boost, buck/boost (i.e. step down, step up, step up/down), I can slap together some mathematics to clarify my statements.

-Jess

Title: Re: Learn about system level design of SMPS
Post by hardings on Aug 7^th, 2005, 1:24am

The chip is step-up mode

I will try to get more information about the papers you mentioned.

Rdgs.

Title: Re: Learn about system level design of SMPS
Post by Jess Chen on Aug 8^th, 2005, 11:19pm

I just ordered a book by Johnny C. Bennett entitled
"Practical Computer Analysis of Switch Mode Power Supplies". It's published by CRC Press. The web site is www.crcpress.com. The advertisement looked like it covers exactly what you need. I bought it because it covers what I did in a previous life and I want to compare my methods against the author's methods. When it comes in a few days, I'll let you know if I think it's worth $169+shipping.

-Jess

Title: Re: Learn about system level design of SMPS
Post by hardings on Aug 9^th, 2005, 7:08pm

Hi, Jess

I searched IEEE website( I have IEEE accout), the paper is too old to get.
I will try another way. The book you have ordered seems good, please kindly let me know if you think it is really good to system design.

Hardings

Title: Re: Learn about system level design of SMPS
Post by Jess Chen on Aug 11^th, 2005, 1:02pm

Hi Hardings,

Here is what I mean by the system being second order:

Consider the "on" position of the switch in your boost converter. And let's assume, according to your description, that the inductor is driven from an ideal voltage source so that we do not have any input filter to consider. Let the source voltage be Vg. Let the inductor current be "i" and the capacitor voltage be "v" and let the load by R. For the on position:

Ldi/dt = vg;
Cdv/dt = -v/R;

For the off position:

Ldi/dt = vg-v;
Cdv/dt = i-v/R;

If we expand the solution over one period to first order in time using the low ripple approximation, we arrive at the state space averaged equations:

Ldi/dt = vg-d'*v;
Cdv/dt = d'*i-v/R;

where d = on-time/period and d'=1-d. Note the product of d' and v as well as the product of d' and i. Those products make the state space averaged model second order in the state variables.

The average action of the switch can be modeled as a DC-to-DC transformer with a dynamic turns ratio of d':1.

Title: Re: Learn about system level design of SMPS
Post by Jess Chen on Aug 16^th, 2005, 9:53am

I received Bennett's book yesterday and flipped through it this morning. The book focuses on SPICE implementations and applications of state space averaged models of switch mode power supplies. Buck, booost, buck/boost, flyback, and push/pull topologies are covered in both continuous and discontinuous conduction modes. Current mode control is also covered. The book leaves the mathematical justification of the basic state space averaged models to the original Cal Tech publications. The book states up front that it addresses analytic issues, not detailed circuit designs like switch drives and snubbers. However, the book does include a good section on circuit models of real components. The book does a good job surveying all the key things to simulate when building a SMPS and includes an excellent discussions on input filter interactions. The book even discusses multiple outputs and post regulation. Since most of the original references are out of print, this book definitely fills a void.

On the negative side, in my opinion the book leaves out a very powerful approach to implementing state space averaged models. Specifically, in my brief review I found no mention of analog behavioral modeling languages: VerilogA, VerilogAMS, VHDLA, Mast, SpectreHDL. Some inexpensive SPICE-based simulators have one-line behavioral sources that would greatly simplify the models. The book only discusses macro models, models built from SPICE primitives. I spent most of the 80s building state space averaged macro models of SMPSs because behavioral modeling languages were not yet widely available. My experience is that macro models take time to build because they are usually prone to convergence problems. I could be wrong, but I suspect the author has seen his share of convergence problems. Perhaps the implementations covered in the book have no convergence problems but I still think convergence issues should have been given more attention; what practices aggravate convergence problems, what practices mitigate them, is there a recipe for numerical options that removes convergence problems while preserving accuracy? Behavioral modeling languages have their convergence problems too but they have far fewer of them than macro models. Of course, if you can't afford a tool that comes with a behavioral modeling language, then you are stuck with macro models. A talented engineer can use any tool but I strongly believe even the most talented engineers will save budget and schedule in the long term by investing in a tool with some behavioral modeling capability.

In summary, I am not sorry I spent $169 plus shipping on the book. If and when I have to analyze another SMPS, Bennett's book will be one of the first references I consult.

Title: Re: Learn about system level design of SMPS
Post by hardings on Aug 17^th, 2005, 1:04am

Thanks , Jess.
The book seems good, I'll buy and read it. I guess it should be easy to transfer from SPICE primitives to analog behavioral modeling languages .

Recently, I found there is some behavioral sources even in Spice 2.
use parameter function, e.g,

v1 1 0 pwl(0 0 10u 10)
v2 2 0 pwl(0 1 10u 2)
r1 3 0 r='v(1)*v(2)'
ib 0 3 1

Then a multiplier is realised. it is like the B element in the IsSpice.
We can use the same way to create any other function.

Title: Re: Learn about system level design of SMPS
Post by Jess Chen on Aug 24^th, 2005, 11:32am

I came across another book with a pretty good section on modeling and analysis of SMPSs:

"Fast Analytical Techniques for Electrical and Electronic Circuits" by Vatche Vorperian. Cambridge University Press. 2002.

The book has some good comparisons of cycle-by-cycle models and averaged models.

-Jess

Title: Re: Learn about system level design of SMPS
Post by hardings on Aug 26^th, 2005, 5:26am

Oh, I'd ever read the introduction about this book, it seems novel , but I did not read the detail. How do you think the way the author used?

Title: Re: Learn about system level design of SMPS
Post by Jess Chen on Aug 26^th, 2005, 10:11pm

I am not sure what you are asking. I have not read the book in much detail yet. However, I saw some presentations on Middlebrook's extra element theorem (discussed in the book) many years ago and it seems quite useful. I am hoping to see some discussion of feedback loops in analog circuits and how to account for loading effects. I mentioned the book because the last chapter covers state space averaged models of SMPs and includes a few comparisons of results from brute force and averaged models. The picture show pretty good agreement between the models.