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Design Languages >> Verilog-AMS >> diode modeling
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Message started by Zorro on Aug 9^th, 2005, 4:17am

Title: diode modeling
Post by Zorro on Aug 9^th, 2005, 4:17am

hello everybody,

I am writing a model that contains an internal diode. this diode is only used when a certain condition arises, and is therefore embedded within an if statement. The equation I am using is:

I(Diode) <+ is*(exp(V(Diode)/$vt)-1)

However I tend to get convergence problems, and when I try to use the limexp function, it compiles ok but the elaborator does not like it. It says that is only possible to use it outside of the if statement.

I do not want to perform the limexp function outside of the if statement and return the result inside the "if" when called, because then the simulator is having to make an unwanted calculation constantly, and hence slowing the process down and using more memory space.

So my question is, is there a way of using the limexp function only when called (i.e. the if statement becomes true)?

Regards,
Douglas Paniagua :P

Title: Re: diode modeling
Post by Zorro on Aug 9^th, 2005, 4:34am

hello just one more thing,

Is there a way of usíng any of the analog operators such as "ddt" iinside conditional statements?

Cheers,
Douglas

Title: Re: diode modeling
Post by Ken Kundert on Aug 9^th, 2005, 4:46pm

Try limexp() rather than exp().

You cannot have the ddt operator inside a conditional unless the argument to the conditional cannot change during an analysis.

-Ken

Title: Re: diode modeling
Post by Geoffrey_Coram on Aug 18^th, 2005, 10:25am

Ken -
You missed his comment that he wanted limexp() inside a conditional.

Zorro -
If the test condition depends only on parameters, then you would be OK -- for example, I have a diode model that checks if BV for the diode is specified, and uses limexp conditionally.

-Geoffrey