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Design >> Analog Design >> cmos inverter
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Message started by jason_class on Aug 10^th, 2005, 9:01am

Title: cmos inverter
Post by jason_class on Aug 10^th, 2005, 9:01am

Hello All

Anyone know where can we find the delay time of a single cmos inverter(buffer) for technology 0.5um and 0.18um?

For the same technology, how much difference for delay time will there be for different companies?
Anyone know of the benchmark?

Kindly let me know.
Also if there is a way to calculate, please share with me about it. If some parameters for each technology are needed, please let me know how to we get the parameters for each technology(from model files)?

If it is from model files, many of them are shown in symbols and the exact name of the symbol are not know, any site that introduce each of the parameters in details?

Kindly help
Thank you

jason

Title: Re: cmos inverter
Post by Paul on Aug 10^th, 2005, 1:45pm

Jason,

look for gate delay information or ring oscillator frequency in the technology information. For example, Europractice (a european technology access provider for academics and research) provides such information for given technologies on their web site:
http://www.europractice.imec.be/europractice/on-line-docs/prototyping/ti/ti_main.html

Each foundry provides several flavors of the same technology node, like low-leakage, high performance, etc. A commonly used benchmark is the frequency of a ring oscillator implemented with inverters.

Hope this answers your question.

Paul

Title: Re: cmos inverter
Post by jason_class on Aug 14^th, 2005, 5:52am

Dear Paul

Thank you so much.
That's a cool link
I will write back if further discussion is needed
Cheers and thanks a lot

Jason