The Designer's Guide Community Forum

The Designer's Guide Community Forum
https://designers-guide.org/forum/YaBB.pl
Design Languages >> Verilog-AMS >> debugging in Verilog AMS
https://designers-guide.org/forum/YaBB.pl?num=1124336852

Message started by king on Aug 17^th, 2005, 8:47pm

Title: debugging in Verilog AMS
Post by king on Aug 17^th, 2005, 8:47pm

Hi everyone!

How do I print the internal variables of a model at DC
simulation in Verilog AMS?

Thanks.

Title: Re: debugging in Verilog AMS
Post by Geoffrey_Coram on Aug 18^th, 2005, 10:09am

You should be able to use $strobe.

begin: named_block
real x;

x = ....

$strobe("x=", x);

end

The latest LRM has $debug, which has the same syntax as $strobe, but prints on every iteration of the analog solver; your simulator may or may not support this task yet.

Title: Re: debugging in Verilog AMS
Post by king on Aug 19^th, 2005, 2:09am

thanks geoffrey.

$strobe does not work.

i can only debug during a transient simulation using
`DEBUG_PRINT("x",x)

is this a problem with my simulator?

Title: Re: debugging in Verilog AMS
Post by Geoffrey_Coram on Aug 22^nd, 2005, 5:27am

$strobe has been in the Verilog-AMS LRM for quite a while, so yes, it is a problem with your simulator. Having said this, I now have a vague recollection of a different thread where it was determined that a particular simulator did not have this system task, but did have $write. (There are subtle differences in the behavior $strobe, $write, $display, $monitor, but I think they're not important for an analog simulation.)

I am not familiar with the `DEBUG_PRINT macro; it is not part of the standard. Perhaps you can look through the header files and find its definition -- which may use $write (or is it $display?).