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Design >> Analog Design >> question on ldo voltage regulator
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Message started by navin_kumar on Sep 21^st, 2005, 4:47am

Title: question on ldo voltage regulator
Post by navin_kumar on Sep 21^st, 2005, 4:47am

IN LINEAR CMOS LDO VOLTAGE REGULATORS
--STUDY SAYS THAT PMOS HAVE STABILITY PROBLEMS
COMPARED TO THE NMOS PASS ELEMENT

CLARIFY THE STABILITY POINT FOR ME
--WHETER BECAUSE NMOS WILL BE SOURCE FOLLOWER CONFIGURATION
SO IT IS HAVING LOW OUTPUT IIMPEDENCE

Title: Re: question on ldo voltage regulator
Post by ywguo on Sep 21^st, 2005, 9:07pm

Hello, Navin,

Yes. You are right.

Yawei

Title: Re: question on ldo voltage regulator
Post by navin_kumar on Sep 21^st, 2005, 11:07pm

Hi Yawei
thanks for clarifying the doubt
could u please give any good paper link for nmos pass element low drop out voltage regulator design

navin

Title: Re: question on ldo voltage regulator
Post by ic_engr on Sep 22^nd, 2005, 8:39am

Hello Navin,

There is a good paper in 2005 ISCAS Titled:

"A Low DropOut CMOS Regulator with High PSR Over Wdieband Frequencies" by V. Gupta

Title: Re: question on ldo voltage regulator
Post by ywguo on Sep 25^th, 2005, 1:48am

Hi, Navin,

You can get Gupta's paper and many good references on the following link.

http://users.ece.gatech.edu/rincon-mora/publicat/pubs.htm

Best regards,
Yawei