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Design >> Analog Design >> Switched Cap. filter
https://designers-guide.org/forum/YaBB.pl?num=1127699684

Message started by atul on Sep 25^th, 2005, 1:25pm

Title: Switched Cap. filter
Post by atul on Sep 25^th, 2005, 1:25pm

Hi,
i am designing a switch capacitor filter which is used in GSM technology by using spectreRF available in Cadence 5.3 version

first step
i have learned how to do simulation of spectreRF.

Second step
i have designed a simple low pass passive filter and replaced the resistance by capacitance and 2 nmos driven by clock.

problem
i couldnot make clocks i used 2 vpulses sources having max and min. voltages are opposites to avoid overlapping.

this is not proper can anyone please tell me how to design a clock for switched capa. filter or is it available in library of cadence.

also i could not able to change the resistance value.

please help me, VERY URGENT

[flash=200,200][/flash]

Title: Re: Switched Cap. filter
Post by Paul on Sep 25^th, 2005, 2:20pm

Hi Atul

atul wrote on Sep 25^th, 2005, 1:25pm:

i couldnot make clocks i used 2 vpulses sources having max and min. voltages are opposites to avoid overlapping.

this is not proper can anyone please tell me how to design a clock for switched capa. filter or is it available in library of cadence.

If you explain what doesn't work it would be easier to help. Maybe you can post the definitions of the sources from the netlist. You can use vpulse sources to generate your clocks, provided you define the parameters correctly.

Quote:

also i could not able to change the resistance value.

What do you mean by this? Did you try to change the capacitor value/frequency?

Paul

Title: Re: Switched Cap. filter
Post by atul on Sep 25^th, 2005, 3:02pm

thanks paul for reply.
i could not do the complete simulation as it showed the errors, the error message:

Internal error found in spectre during periodic steady state analysis `pss'.
Please run `getSpectreFiles' or send the netlist, the spectre log file,
the behavioral model files, and any other information that can help
identify the problem to support@cadence.com.
Assertion failed in file `devices.c' at line 4587.
Assertion failed.
i could not able to locate the devices.c or run the getSpectreFiles.
my circuit is right, i mean it is very basic circuit to design a switched cap filter. i am not sure about the clock.
i am using primlibRF library components

About the resistor, i am using poly2RF resistor available in primlibRF library, i could not able to change the value i want 10 kilo ohm, i can't, it can change max. to 5 kilo ohm, so i am adding the 2 resistor in series.
But this is very simple circuit, for large circuit it will be very difficult.

paul one more thing do you know where i can get the schematic of switched capacitor filter which is implemented in cadence.

again thanks for replied,

Title: Re: Switched Cap. filter
Post by Paul on Sep 25^th, 2005, 3:18pm

This makes things a little clearer. As I am not a regular user of SpectreRF, I'm not sure to be able to answer your questions. I guess SpectreRF would like to see a single source defining the sampling clock. Try using a VCVS for the second clock signal.

For the resistors, I thought you were talking about the switched cap equivalent resistor. I cannot help on this one.

Paul

Title: Re: Switched Cap. filter
Post by Ken Kundert on Sep 25^th, 2005, 6:49pm

This error message is reporting an "Internal Error", also known as a bug. The file devices.c is part of the source code of Spectre. You should report this problem to Cadence.

Given your unfamiliarity with Spectre, perhaps the problem is due to the way you describe the sources or analysis. Perhaps you can post those sections of the netlist?

-Ken