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Design >> Mixed-Signal Design >> 3f spur in current-steering DAC?
https://designers-guide.org/forum/YaBB.pl?num=1128089045

Message started by rhys_williams on Sep 30^th, 2005, 7:04am

Title: 3f spur in current-steering DAC?
Post by rhys_williams on Sep 30^th, 2005, 7:04am

I've been simulating a 12-bit current-steering DAC, initially with ideal current sources, switches etc. I've been introducing non-idealities into the current sources (6 binary-weighted sources, 6 thermometer-decoded bits) and looking at the effects on INL, DNL, SFDR, SNR etc. So far, so good.

Now I've moved on to using a couple of technology design kits and replaced the ideal components with transistor level schematics and their corresponding models. Simulations on my DAC now always show a strong peak at 3f that decreases the SFDR drastically. If I replace the current sources with ideal models the spur disappears. I've tried introducing various types of artificial mismatch into the ideal sources (up to 0.5 LSB) but all that does is raise the noise floor, not produce a sharp peak.

Any ideas where this 3f peak is coming from?

Title: Re: 3f spur in current-steering DAC?
Post by sheldon on Sep 30^th, 2005, 9:35am

Rhys,

Have you modeled the current sources as current
sources without output resistance and capacitance?
If you add the current source output resistance and
capacitance to the model do the results for the "ideal"
model match the transistor level results. In real DACs,
the output impedance is a function of the output code
level and this can cause distortion. In differential the
even-order terms cancel and the odd-order terms
become a problem.

Best Regards,

Sheldon

Title: Re: 3f spur in current-steering DAC?
Post by rhys_williams on Oct 3^rd, 2005, 4:03am

Thanks Sheldon - I've just managed to replicate the 3f spur by using ideal sources in parallel with a resistance, to simulate the output impedance.