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https://designers-guide.org/forum/YaBB.pl Design Languages >> Verilog-AMS >> Is this possible !!! https://designers-guide.org/forum/YaBB.pl?num=1128603226 Message started by jefkat on Oct 6th, 2005, 5:53am |
Title: Is this possible !!! Post by jefkat on Oct 6th, 2005, 5:53am Hey guys, Now, does anyone know if I can do this.... I have a circuit in which the capacitance is changed by turing on different switches (MOS transistors) What I want is # send a comination by AHDL block # read the results back into AHDL block so my AHDl block is sending the various combinations and reading the results back (from sp or ac analysis) Since AHDL is time domain stuff ...is there anyway to fool around??? Cheers shaf |
Title: Re: Is this possible !!! Post by sheldon on Oct 6th, 2005, 6:33pm Jefkat, Could you provide more detail about what you are trying to do? Is the combination that you are sending the model, a combination of digital control signals? For example, are you applying different combinations of dc voltages that represent different digital states and you want to measure the frequency response for the each state? Also could you clarify the meaning of"read the results back"? Depending on what you trying to do there may be solutions. Best Regards, Sheldon |
Title: Re: Is this possible !!! Post by jefkat on Oct 7th, 2005, 1:32am Hi Sheldon, I have a circuit like the following: _______ | | | | ___ ___ ___ ___ * * | | * * * | | \ \ \ \ |____| A Capacitance can be added in the parallel by turning on the respective switch. I have 10 switches. I send binary combination (like digital control signals) to these switches and I have to measure the resulting total capacitance for every combination. So far I was doing it in transient analyis but it is time expensive. I was detecting the phase difference between voltage and current (by detecting zero crossings). Since capacitances change in very small values from one step to another I had to limit the time step alot. I want to switch to s-param or 'ac' analyis. "Reading the results" back mean reading back impedance (or any quantity which can help me determine capacitance and series switch resistance)....I have to log all the results in a file. Many many thanks for your time. Cheers. jefkat. |
Title: Re: Is this possible !!! Post by sheldon on Oct 7th, 2005, 1:57am Jefkat, Why don't you build a structural model from capacitiors and the switch from bmslib. The switches would be turned on and off by dc voltages. The add a series capacitor between the source and the model. You can extract the impedance from the ac voltage at the output of the voltage divider output using the calculator. You should probably also add a resistor to ground to get a nice dc operating point. Best Regards, Sheldon |
Title: Re: Is this possible !!! Post by jefkat on Oct 11th, 2005, 2:53am Thanks sheldon.....but really have no clue to what this bmslib might be ..but I have solved the problem in another way. I still use AHDL block to generate the combos..But this time use no transient analyis. I am sweeping DC at the input of AHDL (to generate different combos) . And for every DC level (so every combo) I run an "sp" analysis, I get the right results in the display window. Next I have to get them into tabular format . you know how to ? (today I have put this question on circuit simulators section of the forum as well) Thanks ! jefakt |
Title: Re: Is this possible !!! Post by jbdavid on Oct 12th, 2005, 1:25am So what you REALLY want is Code:
-------------------------------------------- BUT This model create and destroys charge every time the capacitor value changes .. so you might want to model how the total Q changes when you change capacitor values.. (does the charge remain fairly constant while a capacitor is disconnected from the system? What happens to the voltage when it getst connected back in? |
Title: Re: Is this possible !!! Post by jefkat on Oct 12th, 2005, 2:39am Thanks much for sharing this . jefkat |
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