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Design >> High-Power Design >> Help on layout for power transistor
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Message started by ywguo on Oct 20^th, 2005, 10:43pm

Title: Help on layout for power transistor
Post by ywguo on Oct 20^th, 2005, 10:43pm

Hi,

I am designing a LDO with about 20mA output current.

Would you please introduce any books or tutorials on the layout for power transistor?

Thanks
Yawei

Title: Re: Help on layout for power transistor
Post by sheldon on Oct 21^st, 2005, 8:29am

Yawei,

Hastings book, listed in the books of the Designers guide,
section, includes discussion of power transistor layout. The
second edition is now available.

Best Regards,

Sheldon

Title: Re: Help on layout for power transistor
Post by loose-electron on Aug 3^rd, 2006, 4:28pm

MOS or Bipolar?

The MOS devices are straightforward, just be very fussy about minimizing all your metal and contac resistance paths.

A bipolar one is a lot more picky, bipolar power transistors require ballast in the form of emitter resistance to make sure the currents all balance across the Vbe junctons of the parallel devices. Otherwise one junction runs hot, and all the current goes through there until that junction fries. (Warning - Not seen in simulation!)

On the LDO, be careful with the feedback stability, and the ESR of the compensation network.

Jerry

Title: Re: Help on layout for power transistor
Post by richard88 on Aug 24^th, 2006, 10:15pm

Sheldon,
I've the first edition. Could you provide the important difference between the two editions ?
I also like the first edition.
Thanks,
Richard

sheldon wrote on Oct 21^st, 2005, 8:29am:

Yawei,

Hastings book, listed in the books of the Designers guide,
section, includes discussion of power transistor layout. The
second edition is now available.

Best Regards,

Sheldon