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Design Languages >> VHDL-AMS >> puzzles from a new starter.
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Message started by trashbox on Nov 27th, 2005, 5:33pm

Title: puzzles from a new starter.
Post by trashbox on Nov 27th, 2005, 5:33pm

Hi I plan to learn VHDL-AMS modeling and I am not clear about some issues. Here they go:
1) Which simulator is needed? I have a license for ADvanced MS of Mentor. Is it OK?
2) As I know,VHDL-AMS is used to save time when we simulate mixed-signal circuits such as sigma-delta modulator in ADC and PLLs. How much can it save time? For example, a 2nd-order,signal-loop analog sigma-delta modulator will spend me one or two weeks if I use ADvanced MS of Mentor. If I use VHDL-AMS model, How much time shall I spend on it approximately?
3)How to judge whether my VHDL-AMS is correct or not? I think a reference result is needed. Is it the transistor-level simulation result(use ADvanced MS tools) or Simulink result?

Thanks a lot!

Title: Re: puzzles from a new starter.
Post by Visjnoe on Nov 29th, 2005, 4:14am


Hi


1) AdVanceMS of Mentor is OK for mixed-signal modeling using VHDL-AMS

2) The time-efficiency gained when using MS-HDLs becomes apparent in catching errors early in the design cycle, in avoiding long SPICE simulations (transistor-level), less silicon respins...


3) This is of course a bit of an open issue..."who watches the watcher"? :)

I try to evaluate the behavior/correctness of my models
using:

a) intuition/common sense (e.g. opamp output should not shoot above the supply voltage)

b) mathematical formulae, relationships: does the model obey them?

c) based on design experience (if you ever designed e.g. an LNA, any weird behavior in your model will catch your attention. If you don't have design experience on a block you want to model, resort to papers or try to find someone who has experience with that block.

Kind Regards

Peter

Title: Re: puzzles from a new starter.
Post by trashbox on Nov 29th, 2005, 8:17pm

Hi Visjnoe,
Thank you for your kind reply.

Best regards,
Trashbox

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