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Design >> High-Speed I/O Design >> PCI-Express jitter frequency definition
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Message started by neoflash on Dec 16^th, 2005, 9:13pm

Title: PCI-Express jitter frequency definition
Post by neoflash on Dec 16^th, 2005, 9:13pm

Hi,

It looks there is no definition of the jitter frequency for PCI-Ex.

Then it is hard to know that phase noise should be integrated over what frequence range.

thanks,
Neoflash

Title: Re: PCI-Express jitter frequency definition
Post by Paul on Dec 17^th, 2005, 12:16pm

Hi,

As the PCI-Express standard is not openly available, it may be useful if you provide more information on the jitter spec.

I presume you are talking about sinusoidal jitter in the jitter tolerance specification, right? If so, in most serial link standards (GbE, FC, etc), there is a jitter tolerance mask defined for sinusoidal jitter, which I thought would be the same for PCI-Express.

In your post, ist it this jitter tolerance mask you are talking about?

Paul

Title: Re: PCI-Express jitter frequency definition
Post by neoflash on Dec 17^th, 2005, 8:17pm

Paul:

thanks for the reply.

I am not talking about jitter tolerance mask.

During testing, there will be a filter for the jitter. It is normally bandpass. I am not very clear of how the spec define the low end and high end corner frequency.

THen, the calculated phase noise will be send through the filter, and be integrated over that frequency range. THat's how to get long term jitter. (phase jitter)

thanks,
Neoflash

Title: Re: PCI-Express jitter frequency definition
Post by Paul on Dec 19^th, 2005, 1:31pm

Hi,

I'm sorry but I don't still don't understand your question...

What do you mean by "there will be a filter for the jitter"? Do you mean there is an external filter for the jitter, or are you talking about your receiver frequency response?

The sentence "the calculated phase noise will be send through the filter, and be integrated over that frequency range. THat's how to get long term jitter. (phase jitter) " is even less understandable to me... I guess you are talking about cycle-to-cycle jitter versus n-cycle jitter, right?

Maybe providing some references would help my understanding.

Sorry

Paul

Title: Re: PCI-Express jitter frequency definition
Post by neoflash on Dec 19^th, 2005, 6:39pm

I am calculating long term jitter.

In theory, we should integrate phase noise from 0 to infinity. However, due to receriver noise rejection, the integration range should be change to a bandpass region.

thanks,

Title: Re: PCI-Express jitter frequency definition
Post by Paul on Dec 20^th, 2005, 11:57am

OK, I guess I got it now... You must be talking about the duration which you should consider for jitter accumulation in your receiver oscillator. John McNeill's paper "Jitter in ring oscillators" JSSC 1997 shows that this depends on the loop bandwidth of the PLL the oscillator is sitting in (I presume that's your case). Does this answer your question? Somehow I still don't see the relationship with the PCI-Express spec... Your lower bandwidth bound will be somehow defined by the jitter tolerance specification, but I guess there is no upper bound defined.

Notice McNeill's paper supposes the loop bandwidth is large enough to neglect correlated jitter sources, as considered by Hajimiri in "Jitter and phase noise in ring oscillators", JSSC 1999, which is OK in most designs and today's technologies.

Please let me know if I understood your question correctly this time...

Paul

Title: Re: PCI-Express jitter frequency definition
Post by neoflash on Dec 21^st, 2005, 1:47am

Paul:

thanks for the inputs.

The lower bound should be the receiver CDR's 3db bandwidth to track, since the jitter below that frequency will be well tracked by CDR.

The upper bound is tricky. I can not figure out any clue for a value. Shall that be infinity? My answer is Yes for now understanding. The integrated value will saturate with larger upper bound anyway.

Title: Re: PCI-Express jitter frequency definition
Post by Paul on Dec 21^st, 2005, 11:38am

Right, the lower bound is given by the jitter tolerance spec (i.e. up to what frequency the loop has to track jitter).

In SONET, the upper bound for the loop bandwidth is given by the jitter transfer spec, which defines how much of the input jitter is transferred to the output signal. This is of importance in systems using repeaters, which does not apply for short-distance protocols like PCI-Express. The maximum loop bandwidth in that case is not specified, but it definitely cannot be infinity, because there cannot be jitter accumulation exceeding the oscillator frequency.

Paul

Title: Re: PCI-Express jitter frequency definition
Post by neoflash on Dec 21^st, 2005, 10:25pm

why not?

How to prove it?

Title: Re: PCI-Express jitter frequency definition
Post by Paul on Dec 22^nd, 2005, 12:15am

Maybe my statement was a little strong, but remember that in Hajimiri's formula:
sigma_jit = kappa * sqrt(delta_T)
sigma_jit -> 0 when delta_T -> 0, i.e. when considering very high frequencies. Intuitively speaking, I would say that in the case of jitter at frequencies much larger than the bit rate, the average jitter over one bit period tends to zero.

Does that sound reasonable?

Paul

Title: Re: PCI-Express jitter frequency definition
Post by neoflash on Dec 22^nd, 2005, 5:03am

much better, man!

thank you