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Design Languages >> Verilog-AMS >> How to pass a real value across interfaces
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Message started by Sanjeev on Dec 26^th, 2005, 9:46pm

Title: How to pass a real value across interfaces
Post by Sanjeev on Dec 26^th, 2005, 9:46pm

Hey i want to pass a real value through my testbench but my problem is my DUT takes an input XIN[7:0]

probably using $realtobits i can convert my real value into equivalent bitvector but since my input bus is just 8 bit and $realtobit converts the input real into 64 bit bit vector , so how on earth do i map my input real to my DUT..

Any ideas??

or any way of passing a real value to a input port of a ADC..

Title: Re: How to pass a real value across interfaces
Post by Geoffrey_Coram on Jan 2^nd, 2006, 5:01am

Doesn't the answer depend completely on what your DUT understands those bits to represent?

If your DUT is expecting an integer (0 < XIN < 256), then what do you want to happen to real numbers outside that range, or to numbers with a fractional part?

Title: Re: How to pass a real value across interfaces
Post by Ken Kundert on Jan 2^nd, 2006, 2:10pm

You could try to use an assignment to an OOMR. In other words, you could have a real variable inside your DUT that contains the input value, and you can assign to it directly from within your testbench using a hierarchical reference. There are some restrictions in the language you might have to try to work around. For example, this will not work if the real variable is owned by the analog context. It also will not work if the input changes continuously.

-Ken