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Modeling >> Behavioral Models >> Digitally Controlled Analog Events
https://designers-guide.org/forum/YaBB.pl?num=1136749415

Message started by irfan on Jan 8^th, 2006, 11:43am

Title: Digitally Controlled Analog Events
Post by irfan on Jan 8^th, 2006, 11:43am

Hi! I am a mixed-signal IC designer with strong emphasis on analog design. About three weeks ago, I seriously started using the Verilog-AMS to model my existing designs. In sharp contrast to what I had originally thought about modeling in AMS, I am now having way too much fun doing this. :)

While modeling in purely analog form is no problem, I am having some issues when converting analog models to mixed-mode models, in particular, when using digital events to control analog behavior. As I don't have a reference book handy at home, I will appreciate anyone's help with the following:

(1) Is there a way to make things level sensitive rather using either @(posedge X) or @(negedge X)? I am trying to make the following more general as the control signals may change or may stay constant during the sim:

// Unit resistance vs. SG settings
@(posedge (SG00 | SG01))
Runit = 4.6k;
@(posedge SG10)
Runit = 2.1k;
@(posedge SG11)
Runit = 1.0k;

(2) Can one use the “case” statement for a digital bus in order to control analog? If yes, then what is the correct syntax? For example, I want S[3:0] to have 4 different cases and I am trying to get away from doing the following:

// Rint values vs. Range settings --> 2-to-4 digital decoder output
@(posedge S[0])
Rint = 116*Runit;
@(posedge S[1])
Rint = 87*Runit;
@(posedge S[2])
Rint = 69*Runit;
@(posedge S[3])
Rint = 57*Runit;

Thanks in advance for your help.

Irfan

Title: Re: Digitally Controlled Analog Events
Post by Andrew Beckett on Jan 9^th, 2006, 11:24am

Here's a little example, using a case statement. Note I'm also using always @(S) which means that the code will get invoked any time S changes (positive or negative), and then a case within. You could of course use if within.

Code:

`include "disciplines.vams"
module myres (a,b,S);
inout a,b;
input[1:0] S;
electrical a,b;
logic[1:0] S;

real rval;

always @(S)
case (S)

2'b00: rval=1.0K;
2'b01: rval=2.0K;
2'b10: rval=3.0K;
2'b11: rval=4.0K;

endcase

analog begin

V(a,b)<+I(a,b)*rval;

end

endmodule

This would then be compiled using:

Code:

ncvlog -ams myres.vams

My testbench is as follows:

Code:

`include "disciplines.vams"
module testit;

reg[1:0] S;
electrical agnd;
ground agnd;
electrical n1;

initial begin

S=2'b00;
#50 S=2'b01;
#50 S=2'b10;
#50 S=2'b11;
#50 $finish;

end

isource #(.dc(-1.0m)) I1(n1,agnd);
myres R1(n1,agnd,S);

endmodule

And to compile this:

Code:

ncvlog -ams testit.vams

With an analog control file (very simple) of:

Code:

//
tran tran stop=400n

I can then elaborate and simulate with:

Code:

ncelab testit
ncsim -gui -analogcontrol testit.scs testit

Attached is a png file (out of wavescan) showing the resulting waveforms (I'm plotting the voltage, as the resistor value changes). Note the model is pretty lousy, because it doesn't change the resistor value smoothly - it has an instantaneous switch (which is not a good thing), but this is just to illustrate the principle ;D

Title: Re: Digitally Controlled Analog Events
Post by irfan on Jan 9^th, 2006, 4:49pm

Thanks a lot Andrew! This is way more than what I had expected from this forum! ;D