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https://designers-guide.org/forum/YaBB.pl Simulators >> AMS Simulators >> How to define digital high level to a specific val https://designers-guide.org/forum/YaBB.pl?num=1138982672 Message started by bernd on Feb 3rd, 2006, 8:13am |
Title: How to define digital high level to a specific val Post by bernd on Feb 3rd, 2006, 8:13am In a Cadence DFII analog environmet mixed-signal simulation no matter if it is AMS or SpectreVerilog, the high level of the digital signal is always 5V, if it is displayed in the same waveform window as the analog signal. This happens in AWD as well as in WaveScan. In WaveScan there is an additional option d2aDialog which could create a derivate waveform from the digital one and put it on the right level. Question, does anybody know how to initialy define the digital high level equal to the supply voltage? Thanks Bernd PS: This is not an issue of interface elements or connect rules. |
Title: Re: How to define digital high level to a specific Post by Andrew Beckett on Feb 5th, 2006, 8:43am For AWD there's a private function: awviSetLogicLevels(1.0 4.0) which sets the low and high voltage levels - but it's private. However, since AWD is going away in IC610, I don't see much danger in using it... For wavescan there's cdsenv settings: Code:
I've not tried the wavescan settings, but I think these should do what you want. Regards, Andrew. |
Title: Re: How to define digital high level to a specific Post by bernd on Feb 6th, 2006, 1:12am Thanks Andrew that's exactly what I was looking for. I've overlooked the entries in .../dfII/etc/tools/wavescan/.cdsenv Bernd |
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