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Other CAD Tools >> Physical Verification, Extraction and Analysis >> Silicon Area calculation from Schematic
https://designers-guide.org/forum/YaBB.pl?num=1140170197

Message started by babya on Feb 17^th, 2006, 1:56am

Title: Silicon Area calculation from Schematic
Post by babya on Feb 17^th, 2006, 1:56am

hi, i'm relatively new to the analog layout field. I'm facing a problem now. i have a set of schematics with me to do the layout. before that is done, the PD team need the abstract views of those blocks to do P&R.

Is there any way to do this? i use a cadence DF2 platform. when i use the Floor plan/ Schematic option in the composer, i need an area calculation SKILL function in place. i dont have anything like that now.

will anybody help me on this topic.

Thanks and regards,

Title: Re: Silicon Area calculation from Schematic
Post by Andrew Beckett on Feb 18^th, 2006, 6:33am

Yes, read the manual. I'm pretty certain this is covered in the Preview documentation.

Regards,

Andrew.

Title: Re: Silicon Area calculation from Schematic
Post by babya on Feb 19^th, 2006, 8:13pm

Hi Andrew,

thanks for your reply. but i'm still at loss. is it possible for you to be more specific about those documents. i had a talk with a cadence person. according to him it is not possible to create LEF views from schematic.
my doubt is that, can i produce some sort of estimation from the schematic that can be used by the P&R tool? what is the general method used in the industry in these kind of situations?
i have access to Virtuoso XL layout editor. it is giving some area estimate when i use gen from source option. i'm not sure about the accuracy of that estimate.

thanks in advance

Title: Re: Silicon Area calculation from Schematic
Post by Andrew Beckett on Feb 20^th, 2006, 9:11am

This is not really my main area of expertise, but I just had a quick look in the Preview Reference documentation:

<instdir>/doc/prfref/prfref.pdf

If you look in Appendix F there is a section on "Sample Area Estimator Functions", and it references Chapter 4
which explains how these are used. It's possible to start all this from a schematic based design.

Note that Preview is included as part of VirtuosoXL these days. I'm sure that's what it is you're trying to use...

Regards,

Andrew.

Title: Re: Silicon Area calculation from Schematic
Post by babya on Feb 21^st, 2006, 5:01am

Hi,

that was really helpful. thank you very much. i'm currently doing the assessment using the XL tool. it is giving some good estimates when i use Gen from Schematic option. i feel the prboundary area calculation used in that form is much better than other skill functions. it is doing well with designs with less hierarchy. so i'm finding an estimate of lower level blocks with XL and then use those to assess the top.

hopefully, it should give some good results.

Thanks and regards
;D