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Design Languages >> Verilog-AMS >> how to read and write in same file in verilogA
https://designers-guide.org/forum/YaBB.pl?num=1140693116

Message started by Badri on Feb 23^rd, 2006, 3:11am

Title: how to read and write in same file in verilogA
Post by Badri on Feb 23^rd, 2006, 3:11am

I want to perform multiple read and write operations on the same file in verilogA. How can I achieve this?

Regards
Badri

Title: Re: how to read and write in same file in verilogA
Post by Geoffrey_Coram on Feb 24^th, 2006, 6:15am

Are you not able to $open and $close the file multiple times?

Title: Re: how to read and write in same file in verilogA
Post by Marq on Mar 20^th, 2006, 2:36am

Maybe this is too obvious, but you have to be able to open a file with 'r+' or 'a+' mode (read-update, or append-update) to be able to read and write the same file. That is only possible if your tool is Verilog 1394-2001 compliant. The 1995 standard, on which Verilog-AMS 2.2 is based, only supports writing, except for loading memory data from a file.

Even if the digital part of your simulator correctly supports the Verilog 2001 syntax, the analog part may not if that is provided by another vendor.

Essentially, it depends on what you are trying to achieve.