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Other CAD Tools >> Physical Verification, Extraction and Analysis >> Parasatic Resistance in Post Layout Simulation
https://designers-guide.org/forum/YaBB.pl?num=1145371096

Message started by Faisal on Apr 18^th, 2006, 7:38am

Title: Parasatic Resistance in Post Layout Simulation
Post by Faisal on Apr 18^th, 2006, 7:38am

I am making my post-layout simulation and only the parasatic capacitances are extracted and not the parasatic resistances by Cadence Virtuso. Are there any ways to extract the resistances as well with the Cadence?

If not, what are the alternatives to cater for this parasatic resistance ?

Title: Re: Parasatic Resistance in Post Layout Simulation
Post by bernd on Apr 18^th, 2006, 9:40am

Yes there are ways to extract parasitics R's.

First off all Cadence is the name of the company.
Cadence Virtuoso is the name of the product family, but
commonly know as the name of the layout editor tool.

You don't do parasitic extraction with a company or
a layout editor tool!

There are two (three, but I forget about Dracula) tools available
form the Company Cadence to do parasitic extraction, Assura and Diva.

With Assura parasitic R extraction is setup together with
C extraction, I don't think that people who simulate and compile the
parasitic models for your process design kit exclude R's.
The option to extract R's can be chosen over the GUI
( Tab "Extraction", Extraction Mode == RC ).

With Diva this has to be defined in your 'divaEXT.rul' file
form your design kit, maybe is it not defined, maybe you have
to set an explicit switch in the GUI for R extraction.
If you use Diva you should check this file for
'measureResistance' statements, if it contains some
it's likely that you can extract parasitic R's with you rules.

Bernd

Title: Re: Parasatic Resistance in Post Layout Simulation
Post by ACWWong on Apr 19^th, 2006, 6:59am

Yes you can set the switches to extract resistance is Assura or Diva as mentioned, assuming that someone (the foundry) has created the relevant extraction rules.... i have experienced three cases of :
1) R extraction work fine ... hurrah
2) R extraction rules work, but the calculations were wrong !
3) No R extraction catered for at all....

Also beware of increased netlist due to resistance extraction, it produces a lot more nodes in a circuit than just capacitance extraction.