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Other CAD Tools >> Physical Verification, Extraction and Analysis >> Diva vs Dracula (which is more accurate ??)
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Message started by Faisal on May 9th, 2006, 2:42am

Title: Diva vs Dracula (which is more accurate ??)
Post by Faisal on May 9th, 2006, 2:42am

Hi,

I am running DRC, LVS checks with Diva on my blocks and it indicates that there are no errors. I then do my post layout simulation with analog extracted netlist and the results are correct. However when I run DRACULA on the chip level, I find many errors e.g. unmatched device, unmatched node etc

What could be the possible reasons ?? Which tool is more trust worthy ?? Is this safe for tapeout ??

Regards,
Faisal

Title: Re: Diva vs Dracula (which is more accurate ??)
Post by bernd on May 9th, 2006, 3:15am


1. All physical verification tools were using input files
  so called 'command rules' written by humans.
  As a result the result of your DRC run depends on the
  command rule file used by the tool.

2a. Have you compared the top level result DIVA vs. DRACULA.
  Your only talking about that you have check block level with
  DIVA and top level with DRACULA.
  Maybe the errors occurred are real errors introduced on top.
2b. DRACULA is using for DRC and LVS GDSII layout database and
   CDL netlist whereas DIVA runs direct on Cadence DFII database.
   Maybe there is an translation error which causes the errors.

3. Both tools are not longer state of the art, but this also
  depends on the technology you are using, e.g. nobody will
  use one of them below 130nm CMOS in the industry.

4. I would not do a tapeout if I don't know the errors and
  have a reasonable explanation for them.

Bernd

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