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Simulators >> AMS Simulators >> speeding up co-simulation of VerilogA + devices
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Message started by schehrazi on May 20^th, 2006, 7:58pm

Title: speeding up co-simulation of VerilogA + devices
Post by schehrazi on May 20^th, 2006, 7:58pm

For the following simulation, I am using Cadence Spectre.

Assume we have a system which is modeled in VerilogA. Now, I want to add a low pass filter somewhere in this system. I have two options, 1. make a VerilogA description of that filter 2. make it with Ls and Cs taken from analogLib
It seems that simulating the system with LC filter takes longer than the system with the VerilogA filter. This makes sense to me but is this speed reduction fundamental? I mean is there anyway to speed up the simulation of the VerilogA system with the LC filter in it instead of using the VerilogA filter?

Thank you so much

Title: Re: speeding up co-simulation of VerilogA + device
Post by Geoffrey_Coram on May 24^th, 2006, 4:38am

Does your system have a lot of Ls? They add an extra matrix row to the set of equations, so this could be an issue for large circuits -- though I doubt you'd notice it in a small circuit.

It's also possible that the equations are scaled differently in Verilog-A than with the Ls and Cs, such that the tolerances are harder to satisfy one way or another; ie, if you have a time constant sqrt(1/(LC)) you could get the same constant by doubling L and halving C, but the current in the inductor would be changed by a factor of two and thus the circuit might take fewer iterations to converge (current error less than abstol).