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Design Languages >> Verilog-AMS >> Time varying variable to laplace_nd()
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Message started by Tommy on May 31^st, 2006, 2:17am

Title: Time varying variable to laplace_nd()
Post by Tommy on May 31^st, 2006, 2:17am

HI,
I know this is possible with Verilog-AMS.
My question is specific to Cadence Verilog-A in IC5.1.41

Here is a bit of code that fails in Cadence Verilog-A.

analog begin
@(initial_step("static")) begin
nout[0] = V(in)*(R/(R+R_L));
nout[1] = V(in)*(R/(R+R_L))*(R_C*C);
dout[0] = 1;
dout[1] = V(in)/R;
dout[2] = L*C;
end

V(out) <+ laplace_nd(V(dr) , nout , dout);

When I pass a voltage (which is an input to the block) to laplace_nd using an array
the simulation fails. Is there a work around?

Thanks
Tommy

Title: Re: Time varying variable to laplace_nd()
Post by Geoffrey_Coram on May 31^st, 2006, 9:47am

According to the Verilog-AMS LRM (version 2.2), in Table 4-23, Section 4.4.15, the zeros and poles arguments to laplace_nd are supposed to be constant expressions. Thus, I am surprised that the simulator let you even compile the model.

The LRM is a little sloppy in 4.4.12.4 about a "vector of M real numbers"; I believe it is intended to be a concatenation like the example in 4.4.12.5:

V(out) <+ laplace_nd(V(in), {0,1}, {-1,0,1});

Title: Re: Time varying variable to laplace_nd()
Post by Tommy on May 31^st, 2006, 10:11pm

Geoffrey_Coram wrote on May 31^st, 2006, 9:47am:

Mr. Coram,

Here is the exact bit of code that compiled in verilog-AMS
The coefficents are'nt in an array.

analog begin
//numerator coefficients
n0 = V(in)*(R/(R+R_L));
n1 = V(in)*(R/(R+R_L))*(R_C*C);
n0_2 = V(in)/R;
n1_2 = V(in)*C;

//denominator coefficients
d1 = (C * (R_C + ((R*R_L)/(R+R_L)))) + (L/(R+R_L));
d2 = L*C*((R+R_C)/(R+R_L));
d1_2 = (L/R) + (C*R_C);
d2_2 = L*C;

if (analysis("static")) begin
V(out) <+ V(in)*V(d);
end

V(out) <+ laplace_nd(V(d), {n0, n1}, {1, d1, d2});
I(outsense) <+ -1*laplace_nd(V(d), {n0_2, n1_2}, {1, d1_2, d2_2});
end

Title: Re: Time varying variable to laplace_nd()
Post by Geoffrey_Coram on Jun 1^st, 2006, 4:10am

Tommy wrote on May 31^st, 2006, 10:11pm:

Here is the exact bit of code that compiled in verilog-AMS
The coefficents are'nt in an array.

"verilog-AMS" is a language, not a simulator. What *simulator* were you using?

But the LRM says what it says; I would argue that that simulator has a bug if it allows the coefficients to be voltage-dependent, and you can't rely on it. What happens if you connect some feedback, such that V(in) depends on V(out)? Convergence in an analog simulator could be completely messed up.

That said, it looks to me that you could simply factor out V(in) from the numerator coefficients. I assume that R, C, R_L, and R_C are all parameters? In that case, I'd suggest making the coefficients parameters (localparams if your simulator supports them, which prevents someone from overriding them):
parameter real R = 50;
parameter real L = 10n;
parameter real C = 1p;
parameter real R_L = 50;
parameter real R_C = 50;
parameter real n0 = R / (R+R_L);
parameter real n1 = (R/(R+R_L))*(R_C*C);
parameter real d1 = (C * (R_C + ((R*R_L)/(R+R_L)))) + (L/(R+R_L));
parameter real d2 = L*C*((R+R_C)/(R+R_L));

and then you can write
V(out) <+ laplace_nd(V(d)* V(in), {n0, n1}, {1, d1, d2});

Title: Re: Time varying variable to laplace_nd()
Post by Tommy on Jun 1^st, 2006, 9:31pm

Mr. Coram,
I used silvaco smartspice which refers to Accellera Verilog-AMS std .

Yes factoring out V(in) in this case works. But I was looking at a case
where I cannot factor out the term.

Thanks
Tom

Title: Re: Time varying variable to laplace_nd()
Post by Geoffrey_Coram on Jun 2^nd, 2006, 4:17am

Do the filter coefficients really depend on the input voltage as a function of time?