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Design Languages >> Verilog-AMS >> Convergence with voltage parabola
https://designers-guide.org/forum/YaBB.pl?num=1155826459

Message started by mady79 on Aug 17^th, 2006, 7:54am

Title: Convergence with voltage parabola
Post by mady79 on Aug 17^th, 2006, 7:54am

I am new to this ams and I am trying to generate a voltage parabola .
AMS code is something like this :

rst is stays high for 5ns at posedge of the clock [200nS ]
analog begin

itemp=1u;
I(visa,vint0)<+itemp;
I(vinto,vss)<+0.5p*ddt(vint0,vss);
I(vint0,vss)<+rst*V(vint0,vss)/100;

itemp0=V(vint0,vss)/50k;

I(visa,vint1)<+itemp;
I(vint1,vss)<+0.5p*ddt(vint1,vss);
I(vint1,vss)<+rst*V(vint1,vss)/100;

*itemp0,itemp1 are real ,vint0,vint1 are electrical
I am facing with convergence problems with both vint0 and vint1 signals are there .If i remove the code for vint1 ,it works fine otherwise with both vint0 and vint1 having convergence problems.

Can some one explain why is this happening and how AMS proceeds in time steps ..

Thanks in Advance !

Title: Re: Convergence with voltage parabola
Post by Ken Kundert on Aug 17^th, 2006, 11:45pm

It is always hard to debug a code fragment, as many things are undefined. For example, is there something connected to visa? Also, with no results given, there are no clues the nature of the problem.

Is vinto different from vint0? Should it be?

This model appears to be a constant current feeding into a cascade of two single pole filters. How does that create a parabola? Have you considered just using something like

Code:

V(out) <+ $abstime()*$abstime()

-Ken

Title: Re: Convergence with voltage parabola
Post by mady79 on Aug 18^th, 2006, 1:31am

Thanks Ken for your prompt reply .
$abstime() helps a lot .

I am posting complete code for your reference .I would like to know how to get convergence problem solved may be using intial conditions .
I did the same modeling with analog lib components using voltage controlled current source,resitors and capacitors ,it worked fine there but not
sure why ams does not work .

`timescale 1ns/100ps
`include "constants.vams"
`include "disciplines.vams"

module vparabola (vpard,clk,vdd,vss );

input clk,vdd,vss; //clk -->clock ,vdd-->supply
electrical clk,vdd,vss;
output vpard;
electrical vpard;

real clk_i,clkdel_i,rstphase;//rstphase used to make parabola starts from zero voltage
electrical vinta,vintb;

real itempa,itempb;

analog
begin
@(cross(V(clk,vss)-V(vdd,vss)/2,0,1n,10m) or initial_step) clk_i = (V(clk,vss)>V(vdd,vss)/2 ? 1 : 0);

clkdel_i=transition(clk_i,5n,1n,1n);
rstphase = clk_i*(1-clkdel_i);

itempa= V(vdd,vss)/10e+6;
I(vdd,vinta)<+itempa;

I(vinta,vss)<+0.5p*ddt(V(vinta,vss));
I(vinta,vss)<+rstphase*V(vinta,vss)/100;
//expect a voltage ramp as output proportional to t(time) ;

itempb= V(vinta,vss)/100k;
I(vdd,vintb)<+itempb;
I(vintb,vss)<+0.5p*ddt(V(vintb,vss));
I(vintb,vss)<+rstphase*V(vintb,vss)/100;
//expect a voltage parabola proportional to t^2

V(vpard,vss)<+transition(V(vintb,vss),1n,1n,1n);

end
endmodule

//Thanks in advance ...