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Design >> Analog Design >> How to do the stabilty analysis for this lock?
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Message started by dandelion on Jan 24th, 2007, 1:57am

Title: How to do the stabilty analysis for this lock?
Post by dandelion on Jan 24th, 2007, 1:57am

Hi,
For the attached circuit, I hope to do some stabilty anlaysis,but I dod not know how to break the loop?

Would anyone pls. shed some lights on it?

Thanks

Title: Re: How to do the stabilty analysis for this lock?
Post by adesign on Jan 24th, 2007, 2:43am

Probably you can try this:

R and C are very high values

Title: Re: How to do the stabilty analysis for this lock?
Post by dandelion on Jan 24th, 2007, 7:20pm


adesign wrote on Jan 24th, 2007, 2:43am:
Probably you can try this:

R and C are very high values


Hi adesign,
It has risks with this method.

This is complex loop. You can not break it easily. The capacitor tied to the input and output for both amplifie. So, this cap has the miller efefct for both amplifier. If we break the loop as you mentioned. The miller cap will diaspperared for the 1st ampilfier. I have the concern the loading effect will afffect the simulation accuracy.

Regards

Title: Re: How to do the stabilty analysis for this lock?
Post by Andrew Beckett on Jan 26th, 2007, 6:19am

There are many discussions on this forum about stability analysis. Spectre has an analysis (which improves upon Middlebrook's method) for analysing stability withing requiring you to break the loop(s). Loading is correctly handled as a result using stb analysis. You should find a number of postings about this by using the Forum's search facility.

Regards,

Andrew.

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