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Design >> High-Power Design >> Strange problem in DC/DC
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Message started by mosman on Apr 23rd, 2007, 8:47pm

Title: Strange problem in DC/DC
Post by mosman on Apr 23rd, 2007, 8:47pm

dear friends,

i have a problem in DC/DC buck. please view the attached fig.

this is output of my DC/DC. it seems that there is a DC ripple, DC is not constant, but the value of riplle is very small (1~3mv). based on my privous projects the output should be very flat.

is it stable? or unstable? or some other reason?

could you give me a hint?

best regards,

Title: Re: Strange problem in DC/DC
Post by average on Jun 7th, 2007, 8:10pm

I have met this promlem before , and now i think it is not a problem. The problem is caused by the
simulation precision, you can set  the time step much smaller, and the DC ripple will go out.
                                                                                                       Average

Title: Re: Strange problem in DC/DC
Post by RFICDUDE on Jun 13th, 2007, 8:14pm

It is possible that it is the integration method. Trapezoidal integration method tends to create small oscillations in the transient response. Try changing the integration method to Gear if there is a transient analysis option to do so. If not, then tightening the tolerances a bit may help as suggested above.

It might be helpful to zoom in on the ripple. If the frequency of the ripple is the same as your switching frequency then you have some clock feedthrough which may come from device capacitances. An FFT of the output signal may make it a bit easier to see the frequency content.

Title: Re: Strange problem in DC/DC
Post by Ken Kundert on Jun 13th, 2007, 11:55pm

This is a normal artifact of the display process. It results because timepoints do not consistently line up with the peaks of the waveform. It is nothing to worry about.

-Ken

Title: Re: Strange problem in DC/DC
Post by mosman on Jun 17th, 2007, 11:33pm

Thanks everyone very much.

i have asked for my leader and the engineer of Synopsys. they give the similar answer with yours.
i process the below steps:

decrease the simulation step;
adjust the method;
increase the accurate;

the result becomes better (but the ripple is still  :( ). now i dont think it is a problem. i am waiting for the chip.


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