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Design >> Mixed-Signal Design >> [Q] in PCB design
https://designers-guide.org/forum/YaBB.pl?num=1181120769

Message started by kidhyun on Jun 6^th, 2007, 2:06am

Title: [Q] in PCB design
Post by kidhyun on Jun 6^th, 2007, 2:06am

Dear all,

I am trying to build PCB board to test the chip I made. In designing PCB, do I have to worry about the impedance matching of the chip and transmission line ( routing in PCB)? I think maximum routing length would be less than 4cm and clk frequency is less than 20MHz. If the pulse got reflect at one end and becomes more than Vdd (by adding) it is a problem for me. (I am putting some device on the board, and that device is sensitive to voltage)

Thank You

Title: Re: [Q] in PCB design
Post by mg777 on Jun 6^th, 2007, 4:05am

Transmission line effects become important when the line delay exceeds/equals the risetime of the pulse - for shorter lines the rising edge will 'see' the load even as it is rising. It's exactly like an echo - you realize you got an echo only when you're far enough away from the mountain...tain...tain. Too close and it's pretty much the original signal.

So, what is the line delay? Assume all of the EM wave on the PCB track propagates in the fiberglass (FR-4) where the velocity is half that of light. In this worst case (largest delay) a line length 4 cm means 250 ps. In reality part of the wave will go in air, so that's why we took the largest delay.

In your case the 20 MHz clock has a 50 ns period, so a 5 ns risetime is reasonable. So you can size your line for PCB fab (8 mil is typical) and worry more about the load impedance than the line. Whether you want to use a differential signal is a totally different thing...

M.G.Rajan